From 10e1a4b2fea6a6829c1863fb6843b93721b8f510 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Wed, 6 May 2020 14:51:51 -0600
Subject: [PATCH] format fix in the fabric hierarchy and grid SDC hierarchy to
 be complaint to YAML format

---
 .../src/fabric/fabric_hierarchy_writer.cpp    | 13 +++++++++++--
 .../src/fpga_sdc/sdc_hierarchy_writer.cpp     | 19 +++++++++++--------
 2 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index 959c1fa5f..a40bfee39 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -40,7 +40,7 @@ int rec_output_module_hierarchy_to_text_file(std::fstream& fp,
 
   /* Iterate over all the child module */
   for (const ModuleId& child_module : module_manager.child_modules(parent_module)) {
-    if (false == write_space_to_file(fp, current_hie_depth)) {
+    if (false == write_space_to_file(fp, current_hie_depth * 2)) {
       return 2;
     }
 
@@ -51,7 +51,16 @@ int rec_output_module_hierarchy_to_text_file(std::fstream& fp,
       return 1;
     }
 
+    fp << "- ";
     fp << module_manager.module_name(child_module);
+
+    /* If this is the leaf node, we leave a new line 
+     * Otherwise, we will leave a ':' to be compatible to YAML file format 
+     */
+    if ( (0 != module_manager.child_modules(child_module).size())
+      && (hie_depth_to_stop >= current_hie_depth + 1) ) {
+      fp << ":";
+    }
     fp << "\n";
 
     /* Go to next level */
@@ -123,7 +132,7 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
     return 0;
   }
 
-  fp << top_module_name << "\n";
+  fp << top_module_name << ":" << "\n";
 
   /* Visit child module recursively and output the hierarchy */
   int err_code = rec_output_module_hierarchy_to_text_file(fp,
diff --git a/openfpga/src/fpga_sdc/sdc_hierarchy_writer.cpp b/openfpga/src/fpga_sdc/sdc_hierarchy_writer.cpp
index f4730b350..2c47aec2f 100644
--- a/openfpga/src/fpga_sdc/sdc_hierarchy_writer.cpp
+++ b/openfpga/src/fpga_sdc/sdc_hierarchy_writer.cpp
@@ -79,7 +79,7 @@ void print_pnr_sdc_routing_sb_hierarchy(const std::string& sdc_dir,
     /* Create the file name for SDC */
     std::string sdc_fname(sdc_dir + generate_switch_block_module_name(gsb_coordinate) + std::string(SDC_FILE_NAME_POSTFIX));
 
-    fp << "- " << sb_module_name << "\n";
+    fp << "- " << sb_module_name << ":" << "\n";
 
     /* Go through all the instance */
     for (const size_t& instance_id : module_manager.child_module_instances(top_module, sb_module)) {
@@ -163,7 +163,7 @@ void print_pnr_sdc_routing_cb_hierarchy(const std::string& sdc_dir,
     for (const size_t& instance_id : module_manager.child_module_instances(top_module, cb_module)) {
       std::string cb_instance_name = module_manager.instance_name(top_module, cb_module, instance_id);
       fp << "  ";
-      fp << "- " << cb_instance_name << "\n";  
+      fp << "- " << cb_instance_name << ":" << "\n";  
     } 
 
     fp << "\n";
@@ -208,18 +208,21 @@ void rec_print_pnr_sdc_grid_pb_graph_hierarchy(std::fstream& fp,
   VTR_ASSERT(true == module_manager.valid_module_id(pb_module));
 
   write_space_to_file(fp, depth * 2);
-  fp << "- " << pb_module_name << "\n";
+  fp << "- " << pb_module_name << ":" << "\n";
 
   /* Go through all the instance */
   for (const size_t& instance_id : module_manager.child_module_instances(parent_pb_module, pb_module)) {
     std::string child_instance_name = module_manager.instance_name(parent_pb_module, pb_module, instance_id);
     write_space_to_file(fp, depth * 2);
     fp << "  ";
-    fp << "- " << child_instance_name << "\n";  
+    fp << "- " << child_instance_name;  
 
     if (true == is_primitive_pb_type(parent_pb_type)) {
+      fp << "\n";
       return;
     }
+     
+    fp << ":" << "\n";
 
     /* Note we only go through the graph through the physical modes. 
      * which we build the modules 
@@ -321,13 +324,13 @@ void print_pnr_sdc_grid_hierarchy(const std::string& sdc_dir,
         ModuleId grid_module = module_manager.find_module(grid_module_name);
         VTR_ASSERT(true == module_manager.valid_module_id(grid_module));
 
-        fp << "- " << grid_module_name << "\n";
+        fp << "- " << grid_module_name << ":" << "\n";
 
         /* Go through all the instance */
         for (const size_t& instance_id : module_manager.child_module_instances(top_module, grid_module)) {
           std::string grid_instance_name = module_manager.instance_name(top_module, grid_module, instance_id);
           fp << "  ";
-          fp << "- " << grid_instance_name << "\n";  
+          fp << "- " << grid_instance_name << ":" << "\n";  
 
           rec_print_pnr_sdc_grid_pb_graph_hierarchy(fp,
                                                     2,
@@ -349,13 +352,13 @@ void print_pnr_sdc_grid_hierarchy(const std::string& sdc_dir,
       ModuleId grid_module = module_manager.find_module(grid_module_name);
       VTR_ASSERT(true == module_manager.valid_module_id(grid_module));
 
-      fp << "- " << grid_module_name << "\n";
+      fp << "- " << grid_module_name << ":" << "\n";
 
       /* Go through all the instance */
       for (const size_t& instance_id : module_manager.child_module_instances(top_module, grid_module)) {
         std::string grid_instance_name = module_manager.instance_name(top_module, grid_module, instance_id);
         fp << "  ";
-        fp << "- " << grid_instance_name << "\n";  
+        fp << "- " << grid_instance_name << ":" << "\n";  
 
         rec_print_pnr_sdc_grid_pb_graph_hierarchy(fp,
                                                   2,