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[core] fixed a bug on connecting clk/rst pins from programmable network any CLB inputs

This commit is contained in:
tangxifan 2024-07-09 20:47:15 -07:00
parent 43dbeafd44
commit 0f78803759
1 changed files with 0 additions and 3 deletions
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3
libs/libclkarchopenfpga/src/base/clock_network.cpp
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@ -514,9 +514,6 @@ std::vector<std::string> ClockNetwork::tree_flatten_tap_to_ports(
std::string flatten_tile_str =
tile_info.get_name() + "[" + std::to_string(tile_idx) + "]";
for (size_t& pin_idx : pin_info.pins()) {
if (pin_idx != size_t(clk_pin_id)) {
continue;
}
std::string flatten_pin_str =
pin_info.get_name() + "[" + std::to_string(pin_idx) + "]";
flatten_taps.push_back(flatten_tile_str + "." + flatten_pin_str);