[engine] code format

This commit is contained in:
tangxifan 2022-10-17 14:55:34 -07:00
parent 63d8b00630
commit 0f2b8da7f0
6 changed files with 48 additions and 24 deletions

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@ -20,16 +20,18 @@ namespace openfpga {
/* Constants for io pin table csv parser */
constexpr const int ROW_INDEX_INTERNAL_PIN = 4;
constexpr const int ROW_INDEX_EXTERNAL_PIN = 5;
constexpr const int ROW_INDEX_DIRECTION = 6;
constexpr const int ROW_INDEX_SIDE = 0;
constexpr const int ROW_INDEX_EXTERNAL_PIN = 5;
constexpr const int ROW_INDEX_DIRECTION = 6;
constexpr const int ROW_INDEX_SIDE = 0;
constexpr const char* DIRECTION_INPUT = "in";
constexpr const char* DIRECTION_OUTPUT = "out";
/********************************************************************
* Parse XML codes about <pin_constraints> to an object of PinConstraints
*******************************************************************/
IoPinTable read_csv_io_pin_table(const char* fname, const e_pin_table_direction_convention& pin_dir_convention) {
IoPinTable read_csv_io_pin_table(
const char* fname,
const e_pin_table_direction_convention& pin_dir_convention) {
vtr::ScopedStartFinishTimer timer("Read I/O Pin Table");
IoPinTable io_pin_table;
@ -80,7 +82,8 @@ IoPinTable read_csv_io_pin_table(const char* fname, const e_pin_table_direction_
}
}
/* Parse pin direction from a specific column, this has a higher priority than inferring from pin names */
/* Parse pin direction from a specific column, this has a higher priority
* than inferring from pin names */
std::string port_dir_str = row_vec.at(ROW_INDEX_DIRECTION);
if (port_dir_str == std::string(DIRECTION_INPUT)) {
io_pin_table.set_pin_direction(pin_id, IoPinTable::INPUT);
@ -88,7 +91,8 @@ IoPinTable read_csv_io_pin_table(const char* fname, const e_pin_table_direction_
io_pin_table.set_pin_direction(pin_id, IoPinTable::OUTPUT);
} else {
VTR_LOG(
"Invalid direction defintion! Expect [%s|%s] in the GPIO direction\n", DIRECTION_INPUT, DIRECTION_OUTPUT);
"Invalid direction defintion! Expect [%s|%s] in the GPIO direction\n",
DIRECTION_INPUT, DIRECTION_OUTPUT);
exit(1);
}
}

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@ -20,12 +20,15 @@ enum class e_pin_table_direction_convention {
QUICKLOGIC,
NUM_TYPES
};
const std::map<e_pin_table_direction_convention, const char*> PIN_TABLE_DIRECTION_CONVENTION_STRING = {
{e_pin_table_direction_convention::EXPLICIT, "explicit"},
{e_pin_table_direction_convention::QUICKLOGIC, "quicklogic"}
}; //String versions of side orientations
const std::map<e_pin_table_direction_convention, const char*>
PIN_TABLE_DIRECTION_CONVENTION_STRING = {
{e_pin_table_direction_convention::EXPLICIT, "explicit"},
{e_pin_table_direction_convention::QUICKLOGIC,
"quicklogic"}}; // String versions of side orientations
IoPinTable read_csv_io_pin_table(const char* fname, const e_pin_table_direction_convention& pin_dir_convention);
IoPinTable read_csv_io_pin_table(
const char* fname,
const e_pin_table_direction_convention& pin_dir_convention);
} /* End namespace openfpga*/

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@ -16,7 +16,8 @@ int main(int argc, const char** argv) {
VTR_ASSERT((2 == argc) || (3 == argc));
/* Parse the fabric key from an XML file */
openfpga::IoPinTable io_pin_table = openfpga::read_csv_io_pin_table(argv[1], openfpga::e_pin_table_direction_convention::QUICKLOGIC);
openfpga::IoPinTable io_pin_table = openfpga::read_csv_io_pin_table(
argv[1], openfpga::e_pin_table_direction_convention::QUICKLOGIC);
VTR_LOG("Read the I/O pin table from a csv file: %s.\n", argv[1]);
/* Output to an XML file

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@ -42,7 +42,8 @@ int main(int argc, const char** argv) {
openfpga::read_xml_io_location_map(argv[3]);
VTR_LOG("Read the I/O location map from an XML file: %s.\n", argv[3]);
openfpga::IoPinTable io_pin_table = openfpga::read_csv_io_pin_table(argv[4], openfpga::e_pin_table_direction_convention::QUICKLOGIC);
openfpga::IoPinTable io_pin_table = openfpga::read_csv_io_pin_table(
argv[4], openfpga::e_pin_table_direction_convention::QUICKLOGIC);
VTR_LOG("Read the I/O pin table from a csv file: %s.\n", argv[4]);
/* Convert */

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@ -36,7 +36,8 @@ int pcf2place_wrapper(const OpenfpgaContext& openfpga_context,
CommandOptionId opt_pin_table = cmd.option("pin_table");
CommandOptionId opt_fpga_fix_pins = cmd.option("fpga_fix_pins");
CommandOptionId opt_no_time_stamp = cmd.option("no_time_stamp");
CommandOptionId opt_pin_table_dir_convention = cmd.option("pin_table_direction_convention");
CommandOptionId opt_pin_table_dir_convention =
cmd.option("pin_table_direction_convention");
CommandOptionId opt_verbose = cmd.option("verbose");
std::string pcf_fname = cmd_context.option_value(cmd, opt_pcf);
@ -46,16 +47,28 @@ int pcf2place_wrapper(const OpenfpgaContext& openfpga_context,
std::string pin_table_fname = cmd_context.option_value(cmd, opt_pin_table);
std::string fpga_fix_pins_fname =
cmd_context.option_value(cmd, opt_fpga_fix_pins);
e_pin_table_direction_convention pin_table_dir_convention = e_pin_table_direction_convention::EXPLICIT;
e_pin_table_direction_convention pin_table_dir_convention =
e_pin_table_direction_convention::EXPLICIT;
if (cmd_context.option_enable(cmd, opt_pin_table_dir_convention)) {
std::string pin_table_dir_convention_str = cmd_context.option_value(cmd, opt_pin_table_dir_convention);
if (pin_table_dir_convention_str == std::string(PIN_TABLE_DIRECTION_CONVENTION_STRING.at(e_pin_table_direction_convention::EXPLICIT))) {
std::string pin_table_dir_convention_str =
cmd_context.option_value(cmd, opt_pin_table_dir_convention);
if (pin_table_dir_convention_str ==
std::string(PIN_TABLE_DIRECTION_CONVENTION_STRING.at(
e_pin_table_direction_convention::EXPLICIT))) {
pin_table_dir_convention = e_pin_table_direction_convention::EXPLICIT;
} else if (pin_table_dir_convention_str == std::string(PIN_TABLE_DIRECTION_CONVENTION_STRING.at(e_pin_table_direction_convention::QUICKLOGIC))) {
} else if (pin_table_dir_convention_str ==
std::string(PIN_TABLE_DIRECTION_CONVENTION_STRING.at(
e_pin_table_direction_convention::QUICKLOGIC))) {
pin_table_dir_convention = e_pin_table_direction_convention::QUICKLOGIC;
} else {
VTR_LOG_ERROR("Invalid pin naming convention ('%s') to identify port direction for pin table! Expect ['%s'|'%s'].\n",
pin_table_dir_convention_str.c_str(), PIN_TABLE_DIRECTION_CONVENTION_STRING.at(e_pin_table_direction_convention::EXPLICIT), PIN_TABLE_DIRECTION_CONVENTION_STRING.at(e_pin_table_direction_convention::QUICKLOGIC));
VTR_LOG_ERROR(
"Invalid pin naming convention ('%s') to identify port direction for "
"pin table! Expect ['%s'|'%s'].\n",
pin_table_dir_convention_str.c_str(),
PIN_TABLE_DIRECTION_CONVENTION_STRING.at(
e_pin_table_direction_convention::EXPLICIT),
PIN_TABLE_DIRECTION_CONVENTION_STRING.at(
e_pin_table_direction_convention::QUICKLOGIC));
}
}
@ -78,7 +91,8 @@ int pcf2place_wrapper(const OpenfpgaContext& openfpga_context,
VTR_LOG("Read the I/O location map from an XML file: %s.\n",
fpga_io_map_fname.c_str());
IoPinTable io_pin_table = read_csv_io_pin_table(pin_table_fname.c_str(), pin_table_dir_convention);
IoPinTable io_pin_table =
read_csv_io_pin_table(pin_table_fname.c_str(), pin_table_dir_convention);
VTR_LOG("Read the I/O pin table from a csv file: %s.\n",
pin_table_fname.c_str());

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@ -529,9 +529,10 @@ static ShellCommandId add_openfpga_pcf2place_command(
openfpga::OPT_STRING);
/* Add an option '--pin_table_direction_convention'*/
CommandOptionId opt_pin_table_dir_convention = shell_cmd.add_option(
"pin_table_direction_convention", false,
"the convention to follow when inferring pin direction from the name of ports in pin table file");
CommandOptionId opt_pin_table_dir_convention =
shell_cmd.add_option("pin_table_direction_convention", false,
"the convention to follow when inferring pin "
"direction from the name of ports in pin table file");
shell_cmd.set_option_require_value(opt_fpga_fix_pins_file,
openfpga::OPT_STRING);