diff --git a/libopenfpga/libarchopenfpga/arch/sample_arch.xml b/libopenfpga/libarchopenfpga/arch/sample_arch.xml
index f102f1875..9a9489178 100644
--- a/libopenfpga/libarchopenfpga/arch/sample_arch.xml
+++ b/libopenfpga/libarchopenfpga/arch/sample_arch.xml
@@ -261,7 +261,7 @@
-
+
@@ -277,13 +277,13 @@
-
+
-
-
+
+
-
+
diff --git a/libopenfpga/libarchopenfpga/src/openfpga_arch.h b/libopenfpga/libarchopenfpga/src/openfpga_arch.h
index c5320e051..2bf6e366c 100644
--- a/libopenfpga/libarchopenfpga/src/openfpga_arch.h
+++ b/libopenfpga/libarchopenfpga/src/openfpga_arch.h
@@ -3,6 +3,7 @@
#include "circuit_library.h"
#include "technology_library.h"
+#include "simulation_setting.h"
/* namespace openfpga begins */
namespace openfpga {
@@ -13,6 +14,7 @@ namespace openfpga {
struct Arch {
CircuitLibrary circuit_lib;
TechnologyLibrary tech_lib;
+ SimulationSetting sim_setting;
};
} /* namespace openfpga ends */
diff --git a/libopenfpga/libarchopenfpga/src/simulation_setting.cpp b/libopenfpga/libarchopenfpga/src/simulation_setting.cpp
new file mode 100644
index 000000000..db96ff677
--- /dev/null
+++ b/libopenfpga/libarchopenfpga/src/simulation_setting.cpp
@@ -0,0 +1,129 @@
+#include "vtr_assert.h"
+
+#include "simulation_setting.h"
+
+/************************************************************************
+ * Member functions for class SimulationSetting
+ ***********************************************************************/
+
+/************************************************************************
+ * Constructors
+ ***********************************************************************/
+SimulationSetting::SimulationSetting() {
+ return;
+}
+
+/************************************************************************
+ * Public Accessors
+ ***********************************************************************/
+float SimulationSetting::operating_clock_freqency() const {
+ return clock_frequencies_.x();
+}
+
+float SimulationSetting::programming_clock_freqency() const {
+ return clock_frequencies_.y();
+}
+
+bool SimulationSetting::auto_select_num_clock_cycles() const {
+ return 0 == num_clock_cycles_;
+}
+
+size_t SimulationSetting::num_clock_cycles() const {
+ return num_clock_cycles_;
+}
+
+size_t SimulationSetting::operating_clock_frequency_slack() const {
+ return operating_clock_frequency_slack_;
+}
+
+float SimulationSetting::simulation_temperature() const {
+ return simulation_temperature_;
+}
+
+bool SimulationSetting::verbose_output() const {
+ return verbose_output_;
+}
+
+bool SimulationSetting::capacitance_output() const {
+ return capacitance_output_;
+}
+
+e_sim_accuracy_type SimulationSetting::simulation_accuracy_type() const {
+ return simulation_accuracy_type_;
+}
+
+float SimulationSetting::simulation_accuracy() const {
+ /* If fractional accuracy is selected, we give a zero accuracy */
+ if (SIM_ACCURACY_FRAC == simulation_accuracy_type()) {
+ return 0.;
+ }
+ return simulation_accuracy_;
+}
+
+bool SimulationSetting::fast_simulation() const {
+ return fast_simulation_;
+}
+
+bool SimulationSetting::run_monte_carlo_simulation() const {
+ return 0 == monte_carlo_simulation_points_;
+}
+
+size_t SimulationSetting::monte_carlo_simulation_points() const {
+ return monte_carlo_simulation_points_;
+}
+
+float SimulationSetting::measure_slew_upper_threshold(const e_sim_signal_type& signal_type) const {
+ VTR_ASSERT (true == valid_signal_threshold(slew_upper_thresholds_[signal_type]));
+ return slew_upper_thresholds_[signal_type];
+}
+
+float SimulationSetting::measure_slew_lower_threshold(const e_sim_signal_type& signal_type) const {
+ VTR_ASSERT (true == valid_signal_threshold(slew_lower_thresholds_[signal_type]));
+ return slew_lower_thresholds_[signal_type];
+}
+
+float SimulationSetting::measure_delay_input_threshold(const e_sim_signal_type& signal_type) const {
+ VTR_ASSERT (true == valid_signal_threshold(delay_input_thresholds_[signal_type]));
+ return delay_input_thresholds_[signal_type];
+}
+
+float SimulationSetting::measure_delay_output_threshold(const e_sim_signal_type& signal_type) const {
+ VTR_ASSERT (true == valid_signal_threshold(delay_output_thresholds_[signal_type]));
+ return delay_output_thresholds_[signal_type];
+}
+
+e_sim_accuracy_type SimulationSetting::stimuli_clock_slew_type(const e_sim_signal_type& signal_type) const {
+ return clock_slew_types_[signal_type];
+}
+
+float SimulationSetting::stimuli_clock_slew(const e_sim_signal_type& signal_type) const {
+ /* If fractional accuracy is selected, we give a zero accuracy */
+ if (SIM_ACCURACY_FRAC == stimuli_clock_slew_type(signal_type)) {
+ return 0.;
+ }
+ return clock_slews_[signal_type];
+}
+
+e_sim_accuracy_type SimulationSetting::stimuli_input_slew_type(const e_sim_signal_type& signal_type) const {
+ return input_slew_types_[signal_type];
+}
+
+float SimulationSetting::stimuli_input_slew(const e_sim_signal_type& signal_type) const {
+ /* If fractional accuracy is selected, we give a zero accuracy */
+ if (SIM_ACCURACY_FRAC == stimuli_input_slew_type(signal_type)) {
+ return 0.;
+ }
+ return input_slews_[signal_type];
+}
+
+/************************************************************************
+ * Public Mutators
+ ***********************************************************************/
+
+
+/************************************************************************
+ * Public Validators
+ ***********************************************************************/
+bool SimulationSetting::valid_signal_threshold(const float& threshold) const {
+ return (0. < threshold) && (threshold < 1);
+}
diff --git a/libopenfpga/libarchopenfpga/src/simulation_setting.h b/libopenfpga/libarchopenfpga/src/simulation_setting.h
index 49ecb0f26..689e620b3 100644
--- a/libopenfpga/libarchopenfpga/src/simulation_setting.h
+++ b/libopenfpga/libarchopenfpga/src/simulation_setting.h
@@ -1,9 +1,187 @@
#ifndef SIMULATION_SETTING_H
#define SIMULATION_SETTING_H
+/********************************************************************
+ * This file include the declaration of simulation settings
+ * which are used by OpenFPGA
+ *******************************************************************/
+#include
+#include
+
+#include "vtr_geometry.h"
+
+/********************************************************************
+ * Types of signal type in measurement and stimuli
+ *******************************************************************/
+enum e_sim_signal_type {
+ SIM_SIGNAL_RISE,
+ SIM_SIGNAL_FALL,
+ NUM_SIM_SIGNAL_TYPES
+};
+/* Strings correspond to each delay type */
+constexpr std::array SIM_SIGNAL_TYPE_STRING = {{"rise", "fall"}};
+
+/********************************************************************
+ * Types of simulation accuracy type
+ * 1. Fraction to the operating clock frequency
+ * 2. Absolute value
+ *******************************************************************/
enum e_sim_accuracy_type {
SIM_ACCURACY_FRAC,
- SIM_ACCURACY_ABS
+ SIM_ACCURACY_ABS,
+ NUM_SIM_ACCURACY_TYPES
+};
+/* Strings correspond to each accuracy type */
+constexpr std::array SIM_ACCUARCY_TYPE_STRING = {{"frac", "abs"}};
+
+/********************************************************************
+ * A data structure to describe simulation settings
+ *
+ * Typical usage:
+ * --------------
+ * // Create an empty technology library
+ * SimulationSetting sim_setting;
+ * // call your builder for sim_setting
+ *
+ *******************************************************************/
+class SimulationSetting {
+ public: /* Constructors */
+ SimulationSetting();
+ public: /* Public Accessors */
+ float operating_clock_freqency() const;
+ float programming_clock_freqency() const;
+ bool auto_select_num_clock_cycles() const;
+ size_t num_clock_cycles() const;
+ size_t operating_clock_frequency_slack() const;
+ float simulation_temperature() const;
+ bool verbose_output() const;
+ bool capacitance_output() const;
+ e_sim_accuracy_type simulation_accuracy_type() const;
+ float simulation_accuracy() const;
+ bool fast_simulation() const;
+ bool run_monte_carlo_simulation() const;
+ size_t monte_carlo_simulation_points() const;
+ float measure_slew_upper_threshold(const e_sim_signal_type& signal_type) const;
+ float measure_slew_lower_threshold(const e_sim_signal_type& signal_type) const;
+ float measure_delay_input_threshold(const e_sim_signal_type& signal_type) const;
+ float measure_delay_output_threshold(const e_sim_signal_type& signal_type) const;
+ e_sim_accuracy_type stimuli_clock_slew_type(const e_sim_signal_type& signal_type) const;
+ float stimuli_clock_slew(const e_sim_signal_type& signal_type) const;
+ e_sim_accuracy_type stimuli_input_slew_type(const e_sim_signal_type& signal_type) const;
+ float stimuli_input_slew(const e_sim_signal_type& signal_type) const;
+ public: /* Public Mutators */
+ public: /* Public Validators */
+ bool valid_signal_threshold(const float& threshold) const;
+ private: /* Internal data */
+ /* Operating clock frequency: the clock frequency to be applied to users' implemetation on FPGA
+ * This will be stored in the x() part of vtr::Point
+ * Programming clock frequency: the clock frequency to be applied to configuration protocol of FPGA
+ * This will be stored in the y() part of vtr::Point
+ */
+ vtr::Point clock_frequencies_;
+
+ /* Number of clock cycles to be used in simulation
+ * If the value is 0, the clock cycles can be automatically
+ * inferred from the signal activities of users' implementation
+ */
+ size_t num_clock_cycles_;
+
+ /* Slack or margin to be added to clock frequency
+ * if the operating clock frequency is automatically
+ * detemined by VPR's routing results
+ */
+ float operating_clock_frequency_slack_;
+
+ /* Operating temperature to be use in simulation */
+ float simulation_temperature_;
+
+ /* Options support by simulators
+ * verbose_output: This is an option to turn on verbose output in simulators
+ * Simulation runtime can be slow when this option is on
+ * for large FPGA fabrics!
+ * capacitance_output: Show capacitance of each nodes in the log file
+ * This is an option provided by SPICE simulators
+ * Simulation runtime can be slow when this option is on
+ * for large FPGA fabrics!
+ * accuracy_type: type of accuracy to be used in simulation
+ * See the definition in enumeration e_sim_accuracy_type
+ * Simulation runtime can be slow when a high accuracy is enable
+ * for large FPGA fabrics!
+ * accuracy: the absolute value of accuracy to be used in simulation.
+ * If fractional accuarcy is specified, the value will be determined by
+ * the maximum operating frequency after VPR routing finished
+ * If absolute accuracy is specified, the value will be given by users
+ */
+ bool verbose_output_;
+ bool capacitance_output_;
+ e_sim_accuracy_type simulation_accuracy_type_;
+ float simulation_accuracy_;
+
+ /* Enable fast simulation
+ * Note: this may impact the accuracy of simulation results
+ */
+ bool fast_simulation_;
+
+ /* Number of simulation points to be used in Monte Carlo simulation
+ * If a zero is given, monte carlo simulation will not be applied
+ * The larger number of simulation points is used, the slower runtime will be
+ */
+ size_t monte_carlo_simulation_points_;
+
+ /* The thresholds (in percentage) to be used in the measuring signal slews
+ * Thresholds related to rising edge will be stored in the first element
+ * Thresholds related to falling edge will be stored in the second element
+ */
+ std::array slew_upper_thresholds_;
+ std::array slew_lower_thresholds_;
+
+ /* The thresholds (in percentage) to be used in the measuring signal delays
+ * Thresholds related to rising edge will be stored in the first element
+ * Thresholds related to falling edge will be stored in the second element
+ *
+ * An example of delay measurement in rising edge
+ * from 50% of input signal to 50% of output signal
+ * (delay_input_threshold=0.5; delay_output_threshold=0.5)
+ *
+ * Input signal
+ *
+ * 50% of full swing of input signal
+ * ^ +--------------------------
+ * |/
+ * +----------------+
+ * / | |
+ * -------+ | |
+ * v |
+ * rise delay |
+ * |
+ * Output signal |
+ * | +--------
+ * |/
+ * +
+ * /|
+ * -------------------------+ |
+ * v
+ * 50% of full swing of output signal
+ */
+ std::array delay_input_thresholds_;
+ std::array delay_output_thresholds_;
+
+ /* Stimulus to be given to each type of port.
+ * We support two types of ports:
+ * 1. clock ports
+ * 2. regular input ports
+ *
+ * Slew time related to rising edge will be stored in the first element
+ * Slew time related to falling edge will be stored in the second element
+ *
+ * accuracy_type: type of accuracy to be used in simulation
+ * Fractional accuracy will be determined by the clock frequency
+ * to be defined by user in the clock_setting
+ */
+ std::array clock_slew_types_;
+ std::array clock_slews_;
+ std::array input_slew_types_;
+ std::array input_slews_;
};
#endif