diff --git a/vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_builder.cpp b/vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_builder.cpp index 3e3ee145a..1c013ed2e 100644 --- a/vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_builder.cpp +++ b/vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_builder.cpp @@ -858,6 +858,17 @@ void build_rr_graph_direct_connections(t_rr_graph* rr_graph, return; } +/************************************************************************ + * Reset driver switch of a rr_graph + ***********************************************************************/ +static +void clear_rr_graph_driver_switch(const t_rr_graph* rr_graph) { + for (int inode = 0; inode < rr_graph->num_rr_nodes; ++inode) { + rr_graph->rr_node[inode].driver_switch = 0; + } + return; +} + /************************************************************************ * Main function of this file * Builder for a detailed uni-directional tileable rr_graph @@ -1038,6 +1049,9 @@ void build_tileable_unidir_rr_graph(INP const int L_num_types, vpr_printf(TIO_MESSAGE_INFO, "%lu edges of RR graph built.\n", num_edges); + /* Clear driver switches of the rr_graph */ + clear_rr_graph_driver_switch(&rr_graph); + /************************************************************************ * 8. Allocate external data structures * a. cost_index @@ -1046,7 +1060,7 @@ void build_tileable_unidir_rr_graph(INP const int L_num_types, /* We set global variables for rr_nodes here, they will be updated by rr_graph_external */ num_rr_nodes = rr_graph.num_rr_nodes; rr_node = rr_graph.rr_node; - rr_node_indices = rr_graph.rr_node_indices; + rr_node_indices = rr_graph.rr_node_indices; rr_graph_externals(timing_inf, segment_inf, num_seg_types, chan_width, wire_to_ipin_switch, base_cost_type); diff --git a/vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_gsb.cpp b/vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_gsb.cpp index d9cfd1429..0eae4486a 100755 --- a/vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_gsb.cpp +++ b/vpr7_x2p/vpr/SRC/device/rr_graph/tileable_rr_graph_gsb.cpp @@ -354,7 +354,7 @@ void build_gsb_one_group_track_to_track_map(const t_rr_graph* rr_graph, t_track2track_map* track2track_map) { for (size_t side = 0; side < from_tracks.size(); ++side) { Side side_manager(side); - enum e_side gsb_side = side_manager.get_side(); + enum e_side from_side = side_manager.get_side(); /* Find the other sides where the start tracks will locate */ std::vector to_track_sides; /* 0. opposite side */ @@ -375,9 +375,13 @@ void build_gsb_one_group_track_to_track_map(const t_rr_graph* rr_graph, if (0 == to_tracks[to_side_index].size()) { continue; } + /* Bypass those from_side is same as to_side */ + if (from_side == to_side) { + continue; + } /* Get other track_ids depending on the switch block pattern */ /* Find the track ids that will start at the other sides */ - std::vector to_track_ids = get_switch_block_to_track_id(sb_type, Fs, gsb_side, inode, + std::vector to_track_ids = get_switch_block_to_track_id(sb_type, Fs, from_side, inode, to_side, to_tracks[to_side_index].size()); /* Update the track2track_map: */ diff --git a/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_backannotate_utils.c b/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_backannotate_utils.c index d72b582af..005770a38 100644 --- a/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_backannotate_utils.c +++ b/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_backannotate_utils.c @@ -1800,6 +1800,7 @@ void identify_rr_node_driver_switch(t_det_routing_arch RoutingArch, } LL_rr_node[inode].driver_switch = LL_rr_node[inode].drive_switches[0]; for (iedge = 0; iedge < LL_rr_node[inode].num_drive_rr_nodes; iedge++) { + if (LL_rr_node[inode].driver_switch != LL_rr_node[inode].drive_switches[iedge]) assert (LL_rr_node[inode].driver_switch == LL_rr_node[inode].drive_switches[iedge]); } } diff --git a/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c b/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c index d8de7bfb8..76ca32ca9 100644 --- a/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c +++ b/vpr7_x2p/vpr/SRC/fpga_x2p/base/fpga_x2p_unique_routing.c @@ -1340,11 +1340,12 @@ DeviceRRGSB build_device_rr_gsb(boolean output_sb_xml, char* sb_xml_dir, if (TRUE == output_sb_xml) { std::string fname_prefix(sb_xml_dir); /* Add slash if needed */ - if ('/' != fname_prefix.back()) { - fname_prefix += "/"; - } - fname_prefix += "rotated_"; - write_rr_switch_block_to_xml(fname_prefix, rotated_rr_sb); + //if ('/' != fname_prefix.back()) { + // fname_prefix += "/"; + //} + //fname_prefix += "rotated_"; + //write_rr_switch_block_to_xml(fname_prefix, rotated_rr_sb); + write_rr_switch_block_to_xml(fname_prefix, rr_sb); } } }