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[engine] remove debugging log output

This commit is contained in:
tangxifan 2022-08-27 13:06:05 -07:00
parent c03fab8bb3
commit 0c2b49ddb9
1 changed files with 0 additions and 4 deletions
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4
openfpga/src/fabric/build_top_module_connection.cpp
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@ -453,10 +453,6 @@ void add_top_module_nets_connect_grids_and_cb(ModuleManager& module_manager,
ModulePortId sink_grid_port_id = module_manager.find_module_port(sink_grid_module, sink_grid_port_name); ModulePortId sink_grid_port_id = module_manager.find_module_port(sink_grid_module, sink_grid_port_name);
VTR_ASSERT(true == module_manager.valid_module_port_id(sink_grid_module, sink_grid_port_id)); VTR_ASSERT(true == module_manager.valid_module_port_id(sink_grid_module, sink_grid_port_id));
BasicPort sink_grid_port = module_manager.module_port(sink_grid_module, sink_grid_port_id); BasicPort sink_grid_port = module_manager.module_port(sink_grid_module, sink_grid_port_id);
VTR_LOG("src: %s[%d:%d] -> sink: %s[%ld:%ld]\n",
src_cb_port.get_name().c_str(), src_cb_port.get_lsb(), src_cb_port.get_msb(),
sink_grid_port.get_name().c_str(), sink_grid_port.get_lsb(), sink_grid_port.get_msb()
);
/* Source and sink port should match in size */ /* Source and sink port should match in size */
VTR_ASSERT(src_cb_port.get_width() == sink_grid_port.get_width()); VTR_ASSERT(src_cb_port.get_width() == sink_grid_port.get_width());