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[Tool] enhance error checking in fabric key parser

This commit is contained in:
tangxifan 2020-11-13 10:56:00 -07:00
parent cb025e982f
commit 088198c861
3 changed files with 19 additions and 0 deletions
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1
openfpga/src/fabric/build_top_module.cpp
View File

@ -381,6 +381,7 @@ int build_top_module(ModuleManager& module_manager,
}
status = load_top_module_memory_modules_from_fabric_key(module_manager, top_module,
circuit_lib, config_protocol,
fabric_key);
if (CMD_EXEC_FATAL_ERROR == status) {
return status;

16
openfpga/src/fabric/build_top_module_memory.cpp
View File

@ -523,6 +523,8 @@ void shuffle_top_module_configurable_children(ModuleManager& module_manager,
********************************************************************/
int load_top_module_memory_modules_from_fabric_key(ModuleManager& module_manager,
const ModuleId& top_module,
const CircuitLibrary& circuit_lib,
const ConfigProtocol& config_protocol,
const FabricKey& fabric_key) {
/* Ensure a clean start */
module_manager.clear_configurable_children(top_module);
@ -574,6 +576,20 @@ int load_top_module_memory_modules_from_fabric_key(ModuleManager& module_manager
return CMD_EXEC_FATAL_ERROR;
}
/* If the the child has not configuration bits, error out */
if (0 == find_module_num_config_bits(module_manager, instance_info.first,
circuit_lib, config_protocol.memory_model(),
config_protocol.type())) {
if (!fabric_key.key_alias(key).empty()) {
VTR_LOG_ERROR("Invalid key alias '%s' which has zero configuration bits!\n",
fabric_key.key_alias(key).c_str());
} else {
VTR_LOG_ERROR("Invalid key name '%s' which has zero configuration bits!\n",
fabric_key.key_name(key).c_str());
}
return CMD_EXEC_FATAL_ERROR;
}
/* Now we can add the child to configurable children of the top module */
module_manager.add_configurable_child(top_module,
instance_info.first,

2
openfpga/src/fabric/build_top_module_memory.h
View File

@ -44,6 +44,8 @@ void shuffle_top_module_configurable_children(ModuleManager& module_manager,
int load_top_module_memory_modules_from_fabric_key(ModuleManager& module_manager,
const ModuleId& top_module,
const CircuitLibrary& circuit_lib,
const ConfigProtocol& config_protocol,
const FabricKey& fabric_key);
vtr::vector<ConfigRegionId, size_t> find_top_module_regional_num_config_bit(const ModuleManager& module_manager,