riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[Tool] Fixed a bug in the routing trace finder for direct connections inside repacker

This commit is contained in:
tangxifan 2021-04-24 13:27:44 -06:00
parent c44688739d
commit 0709e5bb81
1 changed files with 7 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
openfpga/src/repack/repack.cpp
View File

@ -28,6 +28,8 @@ namespace openfpga {
* - sink is an input of a primitive pb_type * - sink is an input of a primitive pb_type
* *
* Note: * Note:
* - This function is applicable ONLY to single-mode pb_types!!! Because their routing traces
* are deterministic: there is only 1 valid path from a source pin to a sink pin!!!
* - If there is a fan-out of the current source pb graph pin is not a direct interconnection * - If there is a fan-out of the current source pb graph pin is not a direct interconnection
* the direct search should stop. * the direct search should stop.
* - This function is designed for pb graph without local routing * - This function is designed for pb graph without local routing
@ -58,6 +60,11 @@ bool rec_direct_search_sink_pb_graph_pins(const t_pb_graph_pin* source_pb_pin,
std::vector<t_pb_graph_pin*> sink_pb_pins_to_search; std::vector<t_pb_graph_pin*> sink_pb_pins_to_search;
/* Only support single-mode pb_type!!! */
if (1 != source_pb_pin->parent_node->pb_type->num_modes) {
return false;
}
for (int iedge = 0; iedge < source_pb_pin->num_output_edges; ++iedge) { for (int iedge = 0; iedge < source_pb_pin->num_output_edges; ++iedge) {
if (DIRECT_INTERC != source_pb_pin->output_edges[iedge]->interconnect->type) { if (DIRECT_INTERC != source_pb_pin->output_edges[iedge]->interconnect->type) {
return false; return false;