bug fix for configure port disable_timing writer
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@ -25,6 +25,8 @@
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#include "openfpga_naming.h"
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#include "circuit_library_utils.h"
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#include "sdc_writer_naming.h"
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#include "sdc_writer_utils.h"
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#include "sdc_mux_utils.h"
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@ -76,8 +78,9 @@ int print_sdc_disable_non_mux_circuit_configure_ports(std::fstream& fp,
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* starting from the top-level module: instance id of the top-level module is 0 by default
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* Disable all the outputs of child modules that matches the mux_module id
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*/
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for (const CircuitPortId& sram_port : circuit_lib.model_ports_by_type(model, CIRCUIT_MODEL_PORT_SRAM)) {
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for (const CircuitPortId& sram_port : find_circuit_mode_select_sram_ports(circuit_lib, model)) {
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const std::string& sram_port_name = circuit_lib.port_lib_name(sram_port);
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VTR_ASSERT(true == module_manager.valid_module_port_id(programmable_module, module_manager.find_module_port(programmable_module, sram_port_name)));
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if (CMD_EXEC_FATAL_ERROR ==
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rec_print_sdc_disable_timing_for_module_ports(fp,
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flatten_names,
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@ -17,6 +17,7 @@
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#include "openfpga_naming.h"
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#include "mux_utils.h"
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#include "circuit_library_utils.h"
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#include "sdc_writer_naming.h"
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#include "sdc_writer_utils.h"
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@ -127,8 +128,8 @@ int print_sdc_disable_routing_multiplexer_configure_ports(std::fstream& fp,
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* starting from the top-level module: instance id of the top-level module is 0 by default
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* Disable all the outputs of child modules that matches the mux_module id
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*/
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for (const CircuitPortId& mux_sram_port : circuit_lib.model_ports_by_type(mux_model, CIRCUIT_MODEL_PORT_SRAM)) {
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const std::string& mux_sram_port_name = circuit_lib.port_prefix(mux_sram_port);
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for (const CircuitPortId& mux_sram_port : find_circuit_regular_sram_ports(circuit_lib, mux_model)) {
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const std::string& mux_sram_port_name = circuit_lib.port_lib_name(mux_sram_port);
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VTR_ASSERT(true == module_manager.valid_module_port_id(mux_module, module_manager.find_module_port(mux_module, mux_sram_port_name)));
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if (CMD_EXEC_FATAL_ERROR ==
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rec_print_sdc_disable_timing_for_module_ports(fp,
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@ -141,7 +142,7 @@ int print_sdc_disable_routing_multiplexer_configure_ports(std::fstream& fp,
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return CMD_EXEC_FATAL_ERROR;
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}
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const std::string& mux_sram_inv_port_name = circuit_lib.port_prefix(mux_sram_port) + "_inv";
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const std::string& mux_sram_inv_port_name = circuit_lib.port_lib_name(mux_sram_port) + "_inv";
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VTR_ASSERT(true == module_manager.valid_module_port_id(mux_module, module_manager.find_module_port(mux_module, mux_sram_inv_port_name)));
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if (CMD_EXEC_FATAL_ERROR ==
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rec_print_sdc_disable_timing_for_module_ports(fp,
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