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temp fix for direct connections. Should notify VPR team about this issue: delayless switch is used in direct connection but it is considered as configurable....which is actually NOT!

This commit is contained in:
tangxifan 2020-03-20 17:56:03 -06:00
parent 3c37b33f17
commit 05ec86430a
1 changed files with 12 additions and 0 deletions
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12
openfpga/src/fabric/build_routing_modules.cpp
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@ -471,6 +471,18 @@ void build_connection_block_module_short_interc(ModuleManager& module_manager,
VTR_ASSERT_SAFE(1 == driver_rr_nodes.size()); VTR_ASSERT_SAFE(1 == driver_rr_nodes.size());
const RRNodeId& driver_rr_node = driver_rr_nodes[0]; const RRNodeId& driver_rr_node = driver_rr_nodes[0];
/* Xifan Tang: VPR considers delayless switch to be configurable
* As a result, the direct connection is considered to be configurable...
* Here, I simply kick out OPINs in CB connection because they should be built
* in the top mopdule.
*
* Note: this MUST BE reconsidered if we do have OPIN connected to IPINs
* through a programmable multiplexer!!!
*/
if (OPIN == rr_graph.node_type(driver_rr_node)) {
return;
}
VTR_ASSERT((CHANX == rr_graph.node_type(driver_rr_node)) || (CHANY == rr_graph.node_type(driver_rr_node))); VTR_ASSERT((CHANX == rr_graph.node_type(driver_rr_node)) || (CHANY == rr_graph.node_type(driver_rr_node)));
/* Create port description for the routing track middle output */ /* Create port description for the routing track middle output */