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[script] add missing files

This commit is contained in:
tangxifan 2022-09-29 16:14:38 -07:00
parent a3e7133d63
commit 0565ca7aca
2 changed files with 7 additions and 2 deletions
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5
openfpga_flow/tasks/fpga_bitstream/repack_wire_lut_strong/config/pin_constraints.xml Normal file
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@ -0,0 +1,5 @@
<!-- A dummy pin constraint file, useful when no pin constraints are needed for a benchmark -->
<pin_constraints>
<set_io pin="op_reset[0]" net="rst_i"/>
</pin_constraints>

4
openfpga_flow/vpr_arch/k4_frac_N1_tileable_fracff_40nm.xml
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@ -94,7 +94,7 @@
<equivalent_sites> <equivalent_sites>
<site pb_type="clb"/> <site pb_type="clb"/>
</equivalent_sites> </equivalent_sites>
<input name="I" num_pins="2" equivalent="full"/> <input name="I" num_pins="4" equivalent="full"/>
<input name="reset" num_pins="1" is_non_clock_global="true"/> <input name="reset" num_pins="1" is_non_clock_global="true"/>
<output name="O" num_pins="2" equivalent="none"/> <output name="O" num_pins="2" equivalent="none"/>
<clock name="clk" num_pins="1"/> <clock name="clk" num_pins="1"/>
@ -268,7 +268,7 @@
routing area up significantly, we estimate into the ~70% range. routing area up significantly, we estimate into the ~70% range.
--> -->
<pb_type name="clb"> <pb_type name="clb">
<input name="I" num_pins="2" equivalent="full"/> <input name="I" num_pins="4" equivalent="full"/>
<input name="reset" num_pins="1"/> <input name="reset" num_pins="1"/>
<output name="O" num_pins="2" equivalent="none"/> <output name="O" num_pins="2" equivalent="none"/>
<clock name="clk" num_pins="1"/> <clock name="clk" num_pins="1"/>