From 049ca1446123f7b813d0a55fa26e4528f4272ccd Mon Sep 17 00:00:00 2001 From: tangxifan Date: Wed, 4 Nov 2020 16:17:56 -0700 Subject: [PATCH] [Doc] Add new naming rules for vpr architecture files --- openfpga_flow/vpr_arch/README.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/openfpga_flow/vpr_arch/README.md b/openfpga_flow/vpr_arch/README.md index aad2c1421..99fc2075b 100644 --- a/openfpga_flow/vpr_arch/README.md +++ b/openfpga_flow/vpr_arch/README.md @@ -13,5 +13,9 @@ Please reveal the following architecture features in the names to help quickly s - multi\_io\_capacity: If I/O capacity is different on each side of FPGAs. - reduced\_io: If I/Os only appear a certain or multiple sides of FPGAs - : The technology node which the delay numbers are extracted from. +- TileOrgz: How tile is organized. + * Top-left (Tl): the pins of a tile are placed on the top side and left side only + * Top-right (Tr): the pins of a tile are placed on the top side and right side only + * Bottom-right (Br): the pins of a tile are placed on the bottom side and right side only Other features are used in naming should be listed here.