[test] comment out fpu in iwls2005 due to yosys cannot synthesis; bring des back
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@ -39,20 +39,18 @@ bench3=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/simple_spi/rtl/*.
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bench5=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/tv80/rtl/*.v
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bench6=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/vga_lcd/rtl/*.v
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# AES core has two top modules that can be tested: encryption and decryption
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# Synthesis is too long; skip it
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bench7=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/aes_core/rtl/*.v
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bench8=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/aes_core/rtl/*.v
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bench9=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/fpu/rtl/*.v
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# FIXME: Yosys 0.22 has issues: ABC got stuck due to a lot of combinational loops. Bring this back when there is a new version
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#bench9=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/fpu/rtl/*.v
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bench10=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/pci/rtl/*.v
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bench11=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/spi/rtl/*.v
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bench12=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/systemcaes/rtl/*.v
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bench13=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/usb_funct/rtl/*.v
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bench14=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/wb_conmax/rtl/*.v
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## DES has two versions: area-optimized and performance optimized
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# The DES has same top-level module name as systemcdes
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# Currently openfpga flow has a bug which does not allow same top-level module name
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#bench15=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/des/area_opt/rtl/*.v
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#bench16=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/des/perf_opt/rtl/*.v
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bench15=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/des/area_opt/rtl/*.v
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bench16=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/des/perf_opt/rtl/*.v
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bench17=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/i2c/rtl/*.v
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bench18=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/sasc/rtl/*.v
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bench19=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/iwls2005/ss_pcm/rtl/*.v
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@ -85,13 +83,11 @@ bench11_top = spi_top
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bench12_top = aes
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bench13_top = usbf_top
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bench14_top = wb_conmax_top
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# Not sure either des or des3 is the top module. Need further investigation
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bench15_top = des
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bench16_top = des3
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bench16_top = des
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bench17_top = i2c_master_top
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bench18_top = sasc_top
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bench19_top = pcm_slv_top
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# May conflict with the top module name with other 'des' benchmark; This is a bug of openfpga flow scripts
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bench20_top = des
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bench21_top = usb_phy
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bench22_top = wb_dma_top
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