Merge pull request #1736 from lnis-uofu/xt_clkntwk2

[doc] typo
This commit is contained in:
tangxifan 2024-07-02 21:10:26 -07:00 committed by GitHub
commit 0426d47026
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
1 changed files with 1 additions and 1 deletions

View File

@ -39,7 +39,7 @@ Using the clock network description language, users can define multiple clock ne
.. _fig_prog_clock_network_example_2x2:
.. figure:: figures/prog_clock_network_example_2x2.png
.. figure:: figures/prog_clk_network_example_2x2.png
:width: 100%
:alt: An example of programmable clock network considering a 2x2 FPGA fabric