riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

[lib] update vtr to latest

This commit is contained in:
tangxifan 2024-11-13 10:44:25 -08:00
parent 01e490533e
commit 0167d8a90d
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
vtr-verilog-to-routing

@ -1 +1 @@
Subproject commit 04959b7b8aab26e6301fd554083bfe79bb5384ae Subproject commit 8178b71295d2579c38403529765c95432c44bd0c