From 4d3447f7733aec489c58153c9d94da0d63256e59 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 18:05:38 -0700
Subject: [PATCH 01/15] [core] rework fabric hierarchy writer

---
 .../src/base/openfpga_build_fabric_template.h |  23 +++-
 .../base/openfpga_setup_command_template.h    |  10 ++
 .../src/fabric/fabric_hierarchy_writer.cpp    | 122 +++++++++++++-----
 openfpga/src/fabric/fabric_hierarchy_writer.h |   4 +
 4 files changed, 124 insertions(+), 35 deletions(-)

diff --git a/openfpga/src/base/openfpga_build_fabric_template.h b/openfpga/src/base/openfpga_build_fabric_template.h
index 830e730d4..fcd5b080c 100644
--- a/openfpga/src/base/openfpga_build_fabric_template.h
+++ b/openfpga/src/base/openfpga_build_fabric_template.h
@@ -270,6 +270,7 @@ template <class T>
 int write_fabric_hierarchy_template(const T& openfpga_ctx, const Command& cmd,
                                     const CommandContext& cmd_context) {
   CommandOptionId opt_verbose = cmd.option("verbose");
+  CommandOptionId opt_exclude_empty_modules = cmd.option("exclude_empty_modules");
 
   /* Check the option '--file' is enabled or not
    * Actually, it must be enabled as the shell interface will check
@@ -279,6 +280,18 @@ int write_fabric_hierarchy_template(const T& openfpga_ctx, const Command& cmd,
   VTR_ASSERT(true == cmd_context.option_enable(cmd, opt_file));
   VTR_ASSERT(false == cmd_context.option_value(cmd, opt_file).empty());
 
+  CommandOptionId opt_module = cmd.option("module");
+  std::string root_module = generate_fpga_top_module_name();
+  if (true == cmd_context.option_enable(cmd, opt_module)) {
+    root_module = cmd_context.option_value(cmd, opt_module);
+  }
+
+  CommandOptionId opt_filter = cmd.option("filter");
+  std::string filter("*");
+  if (true == cmd_context.option_enable(cmd, opt_filter)) {
+    filter = cmd_context.option_value(cmd, opt_filter);
+  }
+
   /* Default depth requirement, will not stop until the leaf */
   int depth = -1;
   CommandOptionId opt_depth = cmd.option("depth");
@@ -296,8 +309,14 @@ int write_fabric_hierarchy_template(const T& openfpga_ctx, const Command& cmd,
 
   /* Write hierarchy to a file */
   return write_fabric_hierarchy_to_text_file(
-    openfpga_ctx.module_graph(), openfpga_ctx.module_name_map(), hie_file_name,
-    size_t(depth), cmd_context.option_enable(cmd, opt_verbose));
+    openfpga_ctx.module_graph(),
+    openfpga_ctx.module_name_map(),
+    hie_file_name,
+    root_module,
+    filter,
+    size_t(depth),
+    cmd_context.option_enable(cmd, opt_exclude_empty_modules),
+    cmd_context.option_enable(cmd, opt_verbose));
 }
 
 /********************************************************************
diff --git a/openfpga/src/base/openfpga_setup_command_template.h b/openfpga/src/base/openfpga_setup_command_template.h
index bbd3ae8f6..b0fcb6643 100644
--- a/openfpga/src/base/openfpga_setup_command_template.h
+++ b/openfpga/src/base/openfpga_setup_command_template.h
@@ -461,12 +461,22 @@ ShellCommandId add_write_fabric_hierarchy_command_template(
   shell_cmd.set_option_short_name(opt_file, "f");
   shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING);
 
+  /* Add an option '--module' */
+  CommandOptionId opt_module = shell_cmd.add_option(
+    "module", false, "Specify the root module name(s) which should be considered. By default, it is fpga_top. Regular expression is supported");
+  shell_cmd.set_option_require_value(opt_module, openfpga::OPT_STRING);
+  CommandOptionId opt_filter = shell_cmd.add_option(
+    "filter", false, "Specify the filter which allows user to select modules to appear under each root module tree. By default, it is *. Regular expression is supported");
+  shell_cmd.set_option_require_value(opt_filter, openfpga::OPT_STRING);
+
   /* Add an option '--depth' */
   CommandOptionId opt_depth = shell_cmd.add_option(
     "depth", false,
     "Specify the depth of hierarchy to which the writer should stop");
   shell_cmd.set_option_require_value(opt_depth, openfpga::OPT_INT);
 
+  shell_cmd.add_option("exclude_empty_modules", false, "Exclude modules with no qualified children (match the names defined through filter) from the output file");
+
   /* Add an option '--verbose' */
   shell_cmd.add_option("verbose", false, "Show verbose outputs");
 
diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index 46daae954..96af55f73 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -1,6 +1,7 @@
 /***************************************************************************************
  * Output internal structure of Module Graph hierarchy to file formats
  ***************************************************************************************/
+#include <regex>
 /* Headers from vtrutil library */
 #include "vtr_assert.h"
 #include "vtr_log.h"
@@ -10,6 +11,7 @@
 #include "fabric_hierarchy_writer.h"
 #include "openfpga_digest.h"
 #include "openfpga_naming.h"
+#include "command_exit_codes.h"
 
 /* begin namespace openfpga */
 namespace openfpga {
@@ -23,36 +25,54 @@ namespace openfpga {
 static int rec_output_module_hierarchy_to_text_file(
   std::fstream& fp, const size_t& hie_depth_to_stop,
   const size_t& current_hie_depth, const ModuleManager& module_manager,
-  const ModuleId& parent_module, const bool& verbose) {
+  const ModuleId& parent_module,
+  const std::string& module_name_filter,
+  const bool& verbose) {
   /* Stop if hierarchy depth is beyond the stop line */
   if (hie_depth_to_stop < current_hie_depth) {
-    return 0;
+    return CMD_EXEC_SUCCESS;
   }
 
   if (false == valid_file_stream(fp)) {
-    return 2;
+    return CMD_EXEC_FATAL_ERROR;
   }
 
   /* Iterate over all the child module */
   for (const ModuleId& child_module :
        module_manager.child_modules(parent_module)) {
     if (false == write_space_to_file(fp, current_hie_depth * 2)) {
-      return 2;
+      return CMD_EXEC_FATAL_ERROR;
     }
 
     if (true != module_manager.valid_module_id(child_module)) {
-      VTR_LOGV_ERROR(verbose, "Unable to find the child module '%u'!\n",
-                     size_t(child_module));
-      return 1;
+      VTR_LOGV_ERROR(verbose, "Unable to find the child module '%s' under its parent '%s'!\n",
+                     module_manager.module_name(child_module).c_str(),
+                     module_manager.module_name(parent_module).c_str());
+      return CMD_EXEC_FATAL_ERROR;
     }
 
-    fp << "- ";
+    /* Filter out the names which do not match the pattern */
+    std::string child_module_name = module_manager.module_name(child_module);
+    std::string pattern = module_name_filter;
+    std::regex star_replace("\\*");
+    std::regex questionmark_replace("\\?");
+    std::string wildcard_pattern =
+      std::regex_replace(std::regex_replace(pattern, star_replace, ".*"),
+                         questionmark_replace, ".");
+    std::regex wildcard_regex(wildcard_pattern);
+    if (!std::regex_match(child_module_name, wildcard_regex)) {
+      continue;
+    }
+
+    if (hie_depth_to_stop == current_hie_depth || module_manager.child_modules(child_module).empty()) {
+      fp << "- ";
+    }
     fp << module_manager.module_name(child_module);
 
     /* If this is the leaf node, we leave a new line
      * Otherwise, we will leave a ':' to be compatible to YAML file format
      */
-    if ((0 != module_manager.child_modules(child_module).size()) &&
+    if ((!module_manager.child_modules(child_module).empty()) &&
         (hie_depth_to_stop >= current_hie_depth + 1)) {
       fp << ":";
     }
@@ -62,13 +82,13 @@ static int rec_output_module_hierarchy_to_text_file(
     int status = rec_output_module_hierarchy_to_text_file(
       fp, hie_depth_to_stop,
       current_hie_depth + 1, /* Increment the depth for the next level */
-      module_manager, child_module, verbose);
-    if (0 != status) {
+      module_manager, child_module, module_name_filter, verbose);
+    if (status != CMD_EXEC_SUCCESS) {
       return status;
     }
   }
 
-  return 0;
+  return CMD_EXEC_SUCCESS;
 }
 
 /***************************************************************************************
@@ -86,7 +106,10 @@ static int rec_output_module_hierarchy_to_text_file(
 int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
                                         const ModuleNameMap& module_name_map,
                                         const std::string& fname,
+                                        const std::string& root_module_names,
+                                        const std::string& module_name_filter,
                                         const size_t& hie_depth_to_stop,
+                                        const bool& exclude_empty_modules,
                                         const bool& verbose) {
   std::string timer_message =
     std::string("Write fabric hierarchy to plain-text file '") + fname +
@@ -111,31 +134,64 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
   /* Validate the file stream */
   check_file_stream(fname.c_str(), fp);
 
-  /* Find top-level module */
-  std::string top_module_name =
-    module_name_map.name(generate_fpga_top_module_name());
-  ModuleId top_module = module_manager.find_module(top_module_name);
-  if (true != module_manager.valid_module_id(top_module)) {
-    VTR_LOGV_ERROR(verbose, "Unable to find the top-level module '%s'!\n",
-                   top_module_name.c_str());
-    return 1;
+  size_t cnt = 0;
+  /* Use regular expression to capture the module whose name matches the pattern
+   */
+  for (ModuleId curr_module : module_manager.modules()) {
+    std::string curr_module_name = module_manager.module_name(curr_module);
+    std::string pattern = root_module_names;
+    std::regex star_replace("\\*");
+    std::regex questionmark_replace("\\?");
+    std::string wildcard_pattern =
+      std::regex_replace(std::regex_replace(pattern, star_replace, ".*"),
+                         questionmark_replace, ".");
+    std::regex wildcard_regex(wildcard_pattern);
+    if (!std::regex_match(curr_module_name, wildcard_regex)) {
+      continue;
+    }
+    /* Filter out module without children if required */
+    if (exclude_empty_modules) {
+      bool expect_empty_module = true;
+      for (const ModuleId& child_module :
+           module_manager.child_modules(curr_module)) {
+        /* Filter out the names which do not match the pattern */
+        std::string child_module_name = module_manager.module_name(child_module);
+        std::string pattern = module_name_filter;
+        std::regex star_replace("\\*");
+        std::regex questionmark_replace("\\?");
+        std::string wildcard_pattern =
+          std::regex_replace(std::regex_replace(pattern, star_replace, ".*"),
+                             questionmark_replace, ".");
+        std::regex wildcard_regex(wildcard_pattern);
+        if (std::regex_match(child_module_name, wildcard_regex)) {
+          expect_empty_module = false;
+          break;
+        }
+      }
+      if (expect_empty_module) {
+        continue;
+      }
+    }
+    /* Record current depth of module: top module is the root with 0 depth */
+    size_t hie_depth = 0;
+
+    fp << curr_module_name << ":"
+       << "\n";
+
+    /* Visit child module recursively and output the hierarchy */
+    int err_code = rec_output_module_hierarchy_to_text_file(
+      fp, hie_depth_to_stop, hie_depth + 1, /* Start with level 1 */
+      module_manager, curr_module, module_name_filter, exclude_empty_modules, verbose);
+    /* Catch error code and exit if required */ 
+    cnt++;
   }
 
-  /* Record current depth of module: top module is the root with 0 depth */
-  size_t hie_depth = 0;
-
-  if (hie_depth_to_stop < hie_depth) {
-    return 0;
+  if (cnt == 0) {
+    VTR_LOGV_ERROR(verbose, "Unable to find any module matching the root module name pattern '%s'!\n",
+                   root_module_names.c_str());
+    return CMD_EXEC_FATAL_ERROR;
   }
 
-  fp << top_module_name << ":"
-     << "\n";
-
-  /* Visit child module recursively and output the hierarchy */
-  int err_code = rec_output_module_hierarchy_to_text_file(
-    fp, hie_depth_to_stop, hie_depth + 1, /* Start with level 1 */
-    module_manager, top_module, verbose);
-
   /* close a file */
   fp.close();
 
diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.h b/openfpga/src/fabric/fabric_hierarchy_writer.h
index 71fbea25b..65dfac425 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.h
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.h
@@ -17,7 +17,11 @@ namespace openfpga {
 int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
                                         const ModuleNameMap& module_name_map,
                                         const std::string& fname,
+                                        const std::string& root_module_names,
+                                        const std::string& module_name_filter,
                                         const size_t& hie_depth_to_stop,
+                                        const bool& use_list_in_leaf,
+                                        const bool& exclude_empty_modules,
                                         const bool& verbose);
 
 } /* end namespace openfpga */

From a2fb84dfa9d97d1e58b3ddac4706179e78456e0a Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 18:30:20 -0700
Subject: [PATCH 02/15] [core] add fabric hierarchy writer

---
 .../src/base/openfpga_build_fabric_template.h |  2 +-
 .../src/fabric/fabric_hierarchy_writer.cpp    | 72 ++++++++++++-------
 openfpga/src/fabric/fabric_hierarchy_writer.h |  1 -
 3 files changed, 46 insertions(+), 29 deletions(-)

diff --git a/openfpga/src/base/openfpga_build_fabric_template.h b/openfpga/src/base/openfpga_build_fabric_template.h
index fcd5b080c..b51c90d71 100644
--- a/openfpga/src/base/openfpga_build_fabric_template.h
+++ b/openfpga/src/base/openfpga_build_fabric_template.h
@@ -281,7 +281,7 @@ int write_fabric_hierarchy_template(const T& openfpga_ctx, const Command& cmd,
   VTR_ASSERT(false == cmd_context.option_value(cmd, opt_file).empty());
 
   CommandOptionId opt_module = cmd.option("module");
-  std::string root_module = generate_fpga_top_module_name();
+  std::string root_module = openfpga_ctx.module_name_map().name(generate_fpga_top_module_name());
   if (true == cmd_context.option_enable(cmd, opt_module)) {
     root_module = cmd_context.option_value(cmd, opt_module);
   }
diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index 96af55f73..69e70f4f3 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -16,6 +16,29 @@
 /* begin namespace openfpga */
 namespace openfpga {
 
+/** Identify if the module has no child whose name matches the filter */
+static bool module_filter_all_children(const ModuleManager& module_manager,
+                                       const ModuleId& curr_module,
+                                       const ModuleNameMap& module_name_map,
+                                       const std::string& module_name_filter) {
+  for (const ModuleId& child_module :
+       module_manager.child_modules(curr_module)) {
+    /* Filter out the names which do not match the pattern */
+    std::string child_module_name = module_name_map.name(module_manager.module_name(child_module));
+    std::string pattern = module_name_filter;
+    std::regex star_replace("\\*");
+    std::regex questionmark_replace("\\?");
+    std::string wildcard_pattern =
+      std::regex_replace(std::regex_replace(pattern, star_replace, ".*"),
+                         questionmark_replace, ".");
+    std::regex wildcard_regex(wildcard_pattern);
+    if (std::regex_match(child_module_name, wildcard_regex)) {
+      return false;
+    }
+  }
+  return true;
+}
+
 /***************************************************************************************
  * Recursively output child module of the parent_module to a text file
  * We use Depth-First Search (DFS) here so that we can output a tree down to
@@ -26,6 +49,7 @@ static int rec_output_module_hierarchy_to_text_file(
   std::fstream& fp, const size_t& hie_depth_to_stop,
   const size_t& current_hie_depth, const ModuleManager& module_manager,
   const ModuleId& parent_module,
+  const ModuleNameMap& module_name_map,
   const std::string& module_name_filter,
   const bool& verbose) {
   /* Stop if hierarchy depth is beyond the stop line */
@@ -37,6 +61,16 @@ static int rec_output_module_hierarchy_to_text_file(
     return CMD_EXEC_FATAL_ERROR;
   }
 
+  /* Check if all the child module has not qualified grand-child, use leaf for this level */
+  bool use_list = true;
+  for (const ModuleId& child_module :
+       module_manager.child_modules(parent_module)) {
+    if (!module_filter_all_children(module_manager, child_module, module_name_map, module_name_filter)) {
+      use_list = false;
+      break;
+    }
+  }
+
   /* Iterate over all the child module */
   for (const ModuleId& child_module :
        module_manager.child_modules(parent_module)) {
@@ -52,7 +86,7 @@ static int rec_output_module_hierarchy_to_text_file(
     }
 
     /* Filter out the names which do not match the pattern */
-    std::string child_module_name = module_manager.module_name(child_module);
+    std::string child_module_name = module_name_map.name(module_manager.module_name(child_module));
     std::string pattern = module_name_filter;
     std::regex star_replace("\\*");
     std::regex questionmark_replace("\\?");
@@ -64,7 +98,7 @@ static int rec_output_module_hierarchy_to_text_file(
       continue;
     }
 
-    if (hie_depth_to_stop == current_hie_depth || module_manager.child_modules(child_module).empty()) {
+    if (hie_depth_to_stop == current_hie_depth || use_list) {
       fp << "- ";
     }
     fp << module_manager.module_name(child_module);
@@ -82,7 +116,7 @@ static int rec_output_module_hierarchy_to_text_file(
     int status = rec_output_module_hierarchy_to_text_file(
       fp, hie_depth_to_stop,
       current_hie_depth + 1, /* Increment the depth for the next level */
-      module_manager, child_module, module_name_filter, verbose);
+      module_manager, child_module, module_name_map, module_name_filter, verbose);
     if (status != CMD_EXEC_SUCCESS) {
       return status;
     }
@@ -138,7 +172,7 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
   /* Use regular expression to capture the module whose name matches the pattern
    */
   for (ModuleId curr_module : module_manager.modules()) {
-    std::string curr_module_name = module_manager.module_name(curr_module);
+    std::string curr_module_name = module_name_map.name(module_manager.module_name(curr_module));
     std::string pattern = root_module_names;
     std::regex star_replace("\\*");
     std::regex questionmark_replace("\\?");
@@ -150,27 +184,8 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
       continue;
     }
     /* Filter out module without children if required */
-    if (exclude_empty_modules) {
-      bool expect_empty_module = true;
-      for (const ModuleId& child_module :
-           module_manager.child_modules(curr_module)) {
-        /* Filter out the names which do not match the pattern */
-        std::string child_module_name = module_manager.module_name(child_module);
-        std::string pattern = module_name_filter;
-        std::regex star_replace("\\*");
-        std::regex questionmark_replace("\\?");
-        std::string wildcard_pattern =
-          std::regex_replace(std::regex_replace(pattern, star_replace, ".*"),
-                             questionmark_replace, ".");
-        std::regex wildcard_regex(wildcard_pattern);
-        if (std::regex_match(child_module_name, wildcard_regex)) {
-          expect_empty_module = false;
-          break;
-        }
-      }
-      if (expect_empty_module) {
-        continue;
-      }
+    if (exclude_empty_modules && module_filter_all_children(module_manager, curr_module, module_name_map, module_name_filter)) {
+      continue;
     }
     /* Record current depth of module: top module is the root with 0 depth */
     size_t hie_depth = 0;
@@ -181,8 +196,11 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
     /* Visit child module recursively and output the hierarchy */
     int err_code = rec_output_module_hierarchy_to_text_file(
       fp, hie_depth_to_stop, hie_depth + 1, /* Start with level 1 */
-      module_manager, curr_module, module_name_filter, exclude_empty_modules, verbose);
+      module_manager, curr_module, module_name_map, module_name_filter, verbose);
     /* Catch error code and exit if required */ 
+    if (err_code == CMD_EXEC_FATAL_ERROR) {
+      return err_code;
+    }
     cnt++;
   }
 
@@ -195,7 +213,7 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
   /* close a file */
   fp.close();
 
-  return err_code;
+  return CMD_EXEC_SUCCESS;
 }
 
 } /* end namespace openfpga */
diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.h b/openfpga/src/fabric/fabric_hierarchy_writer.h
index 65dfac425..9d283b3d4 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.h
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.h
@@ -20,7 +20,6 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
                                         const std::string& root_module_names,
                                         const std::string& module_name_filter,
                                         const size_t& hie_depth_to_stop,
-                                        const bool& use_list_in_leaf,
                                         const bool& exclude_empty_modules,
                                         const bool& verbose);
 

From bf24382f198f328c9d0a51af4bf90c237a113581 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 18:33:07 -0700
Subject: [PATCH 03/15] [core] code format

---
 .../src/base/openfpga_build_fabric_template.h | 14 ++---
 .../base/openfpga_setup_command_template.h    | 15 +++--
 .../src/fabric/fabric_hierarchy_writer.cpp    | 62 +++++++++++--------
 openfpga/src/fabric/fabric_hierarchy_writer.h | 13 ++--
 4 files changed, 57 insertions(+), 47 deletions(-)

diff --git a/openfpga/src/base/openfpga_build_fabric_template.h b/openfpga/src/base/openfpga_build_fabric_template.h
index b51c90d71..b36903a22 100644
--- a/openfpga/src/base/openfpga_build_fabric_template.h
+++ b/openfpga/src/base/openfpga_build_fabric_template.h
@@ -270,7 +270,8 @@ template <class T>
 int write_fabric_hierarchy_template(const T& openfpga_ctx, const Command& cmd,
                                     const CommandContext& cmd_context) {
   CommandOptionId opt_verbose = cmd.option("verbose");
-  CommandOptionId opt_exclude_empty_modules = cmd.option("exclude_empty_modules");
+  CommandOptionId opt_exclude_empty_modules =
+    cmd.option("exclude_empty_modules");
 
   /* Check the option '--file' is enabled or not
    * Actually, it must be enabled as the shell interface will check
@@ -281,7 +282,8 @@ int write_fabric_hierarchy_template(const T& openfpga_ctx, const Command& cmd,
   VTR_ASSERT(false == cmd_context.option_value(cmd, opt_file).empty());
 
   CommandOptionId opt_module = cmd.option("module");
-  std::string root_module = openfpga_ctx.module_name_map().name(generate_fpga_top_module_name());
+  std::string root_module =
+    openfpga_ctx.module_name_map().name(generate_fpga_top_module_name());
   if (true == cmd_context.option_enable(cmd, opt_module)) {
     root_module = cmd_context.option_value(cmd, opt_module);
   }
@@ -309,12 +311,8 @@ int write_fabric_hierarchy_template(const T& openfpga_ctx, const Command& cmd,
 
   /* Write hierarchy to a file */
   return write_fabric_hierarchy_to_text_file(
-    openfpga_ctx.module_graph(),
-    openfpga_ctx.module_name_map(),
-    hie_file_name,
-    root_module,
-    filter,
-    size_t(depth),
+    openfpga_ctx.module_graph(), openfpga_ctx.module_name_map(), hie_file_name,
+    root_module, filter, size_t(depth),
     cmd_context.option_enable(cmd, opt_exclude_empty_modules),
     cmd_context.option_enable(cmd, opt_verbose));
 }
diff --git a/openfpga/src/base/openfpga_setup_command_template.h b/openfpga/src/base/openfpga_setup_command_template.h
index b0fcb6643..3d178ee17 100644
--- a/openfpga/src/base/openfpga_setup_command_template.h
+++ b/openfpga/src/base/openfpga_setup_command_template.h
@@ -463,10 +463,15 @@ ShellCommandId add_write_fabric_hierarchy_command_template(
 
   /* Add an option '--module' */
   CommandOptionId opt_module = shell_cmd.add_option(
-    "module", false, "Specify the root module name(s) which should be considered. By default, it is fpga_top. Regular expression is supported");
+    "module", false,
+    "Specify the root module name(s) which should be considered. By default, "
+    "it is fpga_top. Regular expression is supported");
   shell_cmd.set_option_require_value(opt_module, openfpga::OPT_STRING);
-  CommandOptionId opt_filter = shell_cmd.add_option(
-    "filter", false, "Specify the filter which allows user to select modules to appear under each root module tree. By default, it is *. Regular expression is supported");
+  CommandOptionId opt_filter =
+    shell_cmd.add_option("filter", false,
+                         "Specify the filter which allows user to select "
+                         "modules to appear under each root module tree. By "
+                         "default, it is *. Regular expression is supported");
   shell_cmd.set_option_require_value(opt_filter, openfpga::OPT_STRING);
 
   /* Add an option '--depth' */
@@ -475,7 +480,9 @@ ShellCommandId add_write_fabric_hierarchy_command_template(
     "Specify the depth of hierarchy to which the writer should stop");
   shell_cmd.set_option_require_value(opt_depth, openfpga::OPT_INT);
 
-  shell_cmd.add_option("exclude_empty_modules", false, "Exclude modules with no qualified children (match the names defined through filter) from the output file");
+  shell_cmd.add_option("exclude_empty_modules", false,
+                       "Exclude modules with no qualified children (match the "
+                       "names defined through filter) from the output file");
 
   /* Add an option '--verbose' */
   shell_cmd.add_option("verbose", false, "Show verbose outputs");
diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index 69e70f4f3..12098dda2 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -8,10 +8,10 @@
 #include "vtr_time.h"
 
 /* Headers from openfpgautil library */
+#include "command_exit_codes.h"
 #include "fabric_hierarchy_writer.h"
 #include "openfpga_digest.h"
 #include "openfpga_naming.h"
-#include "command_exit_codes.h"
 
 /* begin namespace openfpga */
 namespace openfpga {
@@ -24,7 +24,8 @@ static bool module_filter_all_children(const ModuleManager& module_manager,
   for (const ModuleId& child_module :
        module_manager.child_modules(curr_module)) {
     /* Filter out the names which do not match the pattern */
-    std::string child_module_name = module_name_map.name(module_manager.module_name(child_module));
+    std::string child_module_name =
+      module_name_map.name(module_manager.module_name(child_module));
     std::string pattern = module_name_filter;
     std::regex star_replace("\\*");
     std::regex questionmark_replace("\\?");
@@ -48,10 +49,8 @@ static bool module_filter_all_children(const ModuleManager& module_manager,
 static int rec_output_module_hierarchy_to_text_file(
   std::fstream& fp, const size_t& hie_depth_to_stop,
   const size_t& current_hie_depth, const ModuleManager& module_manager,
-  const ModuleId& parent_module,
-  const ModuleNameMap& module_name_map,
-  const std::string& module_name_filter,
-  const bool& verbose) {
+  const ModuleId& parent_module, const ModuleNameMap& module_name_map,
+  const std::string& module_name_filter, const bool& verbose) {
   /* Stop if hierarchy depth is beyond the stop line */
   if (hie_depth_to_stop < current_hie_depth) {
     return CMD_EXEC_SUCCESS;
@@ -61,11 +60,13 @@ static int rec_output_module_hierarchy_to_text_file(
     return CMD_EXEC_FATAL_ERROR;
   }
 
-  /* Check if all the child module has not qualified grand-child, use leaf for this level */
+  /* Check if all the child module has not qualified grand-child, use leaf for
+   * this level */
   bool use_list = true;
   for (const ModuleId& child_module :
        module_manager.child_modules(parent_module)) {
-    if (!module_filter_all_children(module_manager, child_module, module_name_map, module_name_filter)) {
+    if (!module_filter_all_children(module_manager, child_module,
+                                    module_name_map, module_name_filter)) {
       use_list = false;
       break;
     }
@@ -79,14 +80,17 @@ static int rec_output_module_hierarchy_to_text_file(
     }
 
     if (true != module_manager.valid_module_id(child_module)) {
-      VTR_LOGV_ERROR(verbose, "Unable to find the child module '%s' under its parent '%s'!\n",
-                     module_manager.module_name(child_module).c_str(),
-                     module_manager.module_name(parent_module).c_str());
+      VTR_LOGV_ERROR(
+        verbose,
+        "Unable to find the child module '%s' under its parent '%s'!\n",
+        module_manager.module_name(child_module).c_str(),
+        module_manager.module_name(parent_module).c_str());
       return CMD_EXEC_FATAL_ERROR;
     }
 
     /* Filter out the names which do not match the pattern */
-    std::string child_module_name = module_name_map.name(module_manager.module_name(child_module));
+    std::string child_module_name =
+      module_name_map.name(module_manager.module_name(child_module));
     std::string pattern = module_name_filter;
     std::regex star_replace("\\*");
     std::regex questionmark_replace("\\?");
@@ -116,7 +120,8 @@ static int rec_output_module_hierarchy_to_text_file(
     int status = rec_output_module_hierarchy_to_text_file(
       fp, hie_depth_to_stop,
       current_hie_depth + 1, /* Increment the depth for the next level */
-      module_manager, child_module, module_name_map, module_name_filter, verbose);
+      module_manager, child_module, module_name_map, module_name_filter,
+      verbose);
     if (status != CMD_EXEC_SUCCESS) {
       return status;
     }
@@ -137,14 +142,11 @@ static int rec_output_module_hierarchy_to_text_file(
  * Return 1 if there are more serious bugs in the architecture
  * Return 2 if fail when creating files
  ***************************************************************************************/
-int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
-                                        const ModuleNameMap& module_name_map,
-                                        const std::string& fname,
-                                        const std::string& root_module_names,
-                                        const std::string& module_name_filter,
-                                        const size_t& hie_depth_to_stop,
-                                        const bool& exclude_empty_modules,
-                                        const bool& verbose) {
+int write_fabric_hierarchy_to_text_file(
+  const ModuleManager& module_manager, const ModuleNameMap& module_name_map,
+  const std::string& fname, const std::string& root_module_names,
+  const std::string& module_name_filter, const size_t& hie_depth_to_stop,
+  const bool& exclude_empty_modules, const bool& verbose) {
   std::string timer_message =
     std::string("Write fabric hierarchy to plain-text file '") + fname +
     std::string("'");
@@ -172,7 +174,8 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
   /* Use regular expression to capture the module whose name matches the pattern
    */
   for (ModuleId curr_module : module_manager.modules()) {
-    std::string curr_module_name = module_name_map.name(module_manager.module_name(curr_module));
+    std::string curr_module_name =
+      module_name_map.name(module_manager.module_name(curr_module));
     std::string pattern = root_module_names;
     std::regex star_replace("\\*");
     std::regex questionmark_replace("\\?");
@@ -184,7 +187,9 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
       continue;
     }
     /* Filter out module without children if required */
-    if (exclude_empty_modules && module_filter_all_children(module_manager, curr_module, module_name_map, module_name_filter)) {
+    if (exclude_empty_modules &&
+        module_filter_all_children(module_manager, curr_module, module_name_map,
+                                   module_name_filter)) {
       continue;
     }
     /* Record current depth of module: top module is the root with 0 depth */
@@ -196,8 +201,9 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
     /* Visit child module recursively and output the hierarchy */
     int err_code = rec_output_module_hierarchy_to_text_file(
       fp, hie_depth_to_stop, hie_depth + 1, /* Start with level 1 */
-      module_manager, curr_module, module_name_map, module_name_filter, verbose);
-    /* Catch error code and exit if required */ 
+      module_manager, curr_module, module_name_map, module_name_filter,
+      verbose);
+    /* Catch error code and exit if required */
     if (err_code == CMD_EXEC_FATAL_ERROR) {
       return err_code;
     }
@@ -205,8 +211,10 @@ int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
   }
 
   if (cnt == 0) {
-    VTR_LOGV_ERROR(verbose, "Unable to find any module matching the root module name pattern '%s'!\n",
-                   root_module_names.c_str());
+    VTR_LOGV_ERROR(
+      verbose,
+      "Unable to find any module matching the root module name pattern '%s'!\n",
+      root_module_names.c_str());
     return CMD_EXEC_FATAL_ERROR;
   }
 
diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.h b/openfpga/src/fabric/fabric_hierarchy_writer.h
index 9d283b3d4..c12d6af2f 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.h
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.h
@@ -14,14 +14,11 @@
 /* begin namespace openfpga */
 namespace openfpga {
 
-int write_fabric_hierarchy_to_text_file(const ModuleManager& module_manager,
-                                        const ModuleNameMap& module_name_map,
-                                        const std::string& fname,
-                                        const std::string& root_module_names,
-                                        const std::string& module_name_filter,
-                                        const size_t& hie_depth_to_stop,
-                                        const bool& exclude_empty_modules,
-                                        const bool& verbose);
+int write_fabric_hierarchy_to_text_file(
+  const ModuleManager& module_manager, const ModuleNameMap& module_name_map,
+  const std::string& fname, const std::string& root_module_names,
+  const std::string& module_name_filter, const size_t& hie_depth_to_stop,
+  const bool& exclude_empty_modules, const bool& verbose);
 
 } /* end namespace openfpga */
 

From d3b1e562adce4d99e9e742f668f9b8184bc85b69 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 21:11:20 -0700
Subject: [PATCH 04/15] [core] fixed some bugs on format

---
 openfpga/src/fabric/fabric_hierarchy_writer.cpp | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index 12098dda2..e8748c8f2 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -71,6 +71,10 @@ static int rec_output_module_hierarchy_to_text_file(
       break;
     }
   }
+  VTR_LOGV(verbose, "Current depth: %lu, Target depth: %lu\n", current_hie_depth, hie_depth_to_stop);
+  VTR_LOGV(use_list && verbose, "Use list as module '%s' contains only leaf nodes\n",
+           module_name_map.name(module_manager.module_name(parent_module)).c_str()
+          );
 
   /* Iterate over all the child module */
   for (const ModuleId& child_module :
@@ -203,6 +207,7 @@ int write_fabric_hierarchy_to_text_file(
       fp, hie_depth_to_stop, hie_depth + 1, /* Start with level 1 */
       module_manager, curr_module, module_name_map, module_name_filter,
       verbose);
+    VTR_LOGV(verbose, "Select module '%s' as root\n", module_name_map.name(module_manager.module_name(curr_module)).c_str());
     /* Catch error code and exit if required */
     if (err_code == CMD_EXEC_FATAL_ERROR) {
       return err_code;
@@ -211,12 +216,12 @@ int write_fabric_hierarchy_to_text_file(
   }
 
   if (cnt == 0) {
-    VTR_LOGV_ERROR(
-      verbose,
+    VTR_LOG_ERROR(
       "Unable to find any module matching the root module name pattern '%s'!\n",
       root_module_names.c_str());
     return CMD_EXEC_FATAL_ERROR;
   }
+  VTR_LOG("Outputted %lu modules as root\n", cnt);
 
   /* close a file */
   fp.close();

From b85ec28eb857eb2044d56c72558e6ef86de2e8ec Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 21:17:17 -0700
Subject: [PATCH 05/15] [core] code format

---
 openfpga/src/fabric/fabric_hierarchy_writer.cpp | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index e8748c8f2..ae02a03f0 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -71,10 +71,11 @@ static int rec_output_module_hierarchy_to_text_file(
       break;
     }
   }
-  VTR_LOGV(verbose, "Current depth: %lu, Target depth: %lu\n", current_hie_depth, hie_depth_to_stop);
-  VTR_LOGV(use_list && verbose, "Use list as module '%s' contains only leaf nodes\n",
-           module_name_map.name(module_manager.module_name(parent_module)).c_str()
-          );
+  VTR_LOGV(verbose, "Current depth: %lu, Target depth: %lu\n",
+           current_hie_depth, hie_depth_to_stop);
+  VTR_LOGV(
+    use_list && verbose, "Use list as module '%s' contains only leaf nodes\n",
+    module_name_map.name(module_manager.module_name(parent_module)).c_str());
 
   /* Iterate over all the child module */
   for (const ModuleId& child_module :
@@ -207,7 +208,9 @@ int write_fabric_hierarchy_to_text_file(
       fp, hie_depth_to_stop, hie_depth + 1, /* Start with level 1 */
       module_manager, curr_module, module_name_map, module_name_filter,
       verbose);
-    VTR_LOGV(verbose, "Select module '%s' as root\n", module_name_map.name(module_manager.module_name(curr_module)).c_str());
+    VTR_LOGV(
+      verbose, "Select module '%s' as root\n",
+      module_name_map.name(module_manager.module_name(curr_module)).c_str());
     /* Catch error code and exit if required */
     if (err_code == CMD_EXEC_FATAL_ERROR) {
       return err_code;

From c557b0104a1a01b386b8d429b4f1073b5d580cb2 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 21:34:12 -0700
Subject: [PATCH 06/15] [core] avoid unwanted tab

---
 openfpga/src/fabric/fabric_hierarchy_writer.cpp | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index ae02a03f0..d94f2ff27 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -80,10 +80,6 @@ static int rec_output_module_hierarchy_to_text_file(
   /* Iterate over all the child module */
   for (const ModuleId& child_module :
        module_manager.child_modules(parent_module)) {
-    if (false == write_space_to_file(fp, current_hie_depth * 2)) {
-      return CMD_EXEC_FATAL_ERROR;
-    }
-
     if (true != module_manager.valid_module_id(child_module)) {
       VTR_LOGV_ERROR(
         verbose,
@@ -107,10 +103,13 @@ static int rec_output_module_hierarchy_to_text_file(
       continue;
     }
 
+    if (false == write_space_to_file(fp, current_hie_depth * 2)) {
+      return CMD_EXEC_FATAL_ERROR;
+    }
     if (hie_depth_to_stop == current_hie_depth || use_list) {
       fp << "- ";
     }
-    fp << module_manager.module_name(child_module);
+    fp << module_name_map.name(module_manager.module_name(child_module));
 
     /* If this is the leaf node, we leave a new line
      * Otherwise, we will leave a ':' to be compatible to YAML file format

From 4e3bbbe45e79a1d5251c86f1b98ac010e1cb3278 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 22:00:47 -0700
Subject: [PATCH 07/15] [test] add options to write fabric hierarchy file

---
 ...up_config_block_preconfig_testbench_example_script.openfpga | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/openfpga_flow/openfpga_shell_scripts/group_config_block_preconfig_testbench_example_script.openfpga b/openfpga_flow/openfpga_shell_scripts/group_config_block_preconfig_testbench_example_script.openfpga
index cdb981da2..afe6032bd 100644
--- a/openfpga_flow/openfpga_shell_scripts/group_config_block_preconfig_testbench_example_script.openfpga
+++ b/openfpga_flow/openfpga_shell_scripts/group_config_block_preconfig_testbench_example_script.openfpga
@@ -30,7 +30,8 @@ ${OPENFPGA_ADD_FPGA_CORE_MODULE}
 
 # Write the fabric hierarchy of module graph to a file
 # This is used by hierarchical PnR flows
-write_fabric_hierarchy --file ./fabric_hierarchy.txt
+write_fabric_hierarchy --file ./config_mem.yaml --depth 1 --module * --filter *config_group_mem* --verbose --exclude_empty_modules
+write_fabric_hierarchy --file ./mux_modules.txt --depth 1 --module (grid|cbx|cby|sb)* --filter *mux*_size([0-9]+) --verbose --exclude_empty_modules
 
 # Repack the netlist to physical pbs
 # This must be done before bitstream generator and testbench generation

From 98006608c2000611b61e2cae147123bfe34ec1f3 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 22:03:23 -0700
Subject: [PATCH 08/15] [test] add fabric hierarchy file to golden outputs

---
 .../no_time_stamp_example_script.openfpga                       | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga b/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
index 32b475aae..6b2d3eb43 100644
--- a/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
+++ b/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
@@ -27,7 +27,7 @@ build_fabric --compress_routing #--verbose
 
 # Write the fabric hierarchy of module graph to a file
 # This is used by hierarchical PnR flows
-write_fabric_hierarchy --file ./fabric_hierarchy.txt
+write_fabric_hierarchy --file ${OPENFPGA_OUPUT_DIR}/mux_modules.yaml --depth 1 --module (grid|cbx|cby|sb)* --filter *mux*_size([0-9]+) --verbose --exclude_empty_modules
 
 # Write the fabric I/O attributes to a file
 # This is used by pin constraint files

From c334a0a792fdd61870fa6dcae3223eedb90349f3 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 22:07:22 -0700
Subject: [PATCH 09/15] [test] fixed a bug and add golden outputs

---
 .../no_time_stamp_example_script.openfpga     |  2 +-
 .../mux_modules.yaml                          | 24 ++++++++
 .../mux_modules.yaml                          | 55 +++++++++++++++++++
 .../mux_modules.yaml                          | 24 ++++++++
 .../mux_modules.yaml                          | 54 ++++++++++++++++++
 5 files changed, 158 insertions(+), 1 deletion(-)
 create mode 100644 openfpga_flow/tasks/basic_tests/no_time_stamp/device_1x1/golden_outputs_no_time_stamp/mux_modules.yaml
 create mode 100644 openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/mux_modules.yaml
 create mode 100644 openfpga_flow/tasks/basic_tests/no_time_stamp/dump_waveform/golden_outputs_no_time_stamp/mux_modules.yaml
 create mode 100644 openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/mux_modules.yaml

diff --git a/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga b/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
index 6b2d3eb43..990476956 100644
--- a/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
+++ b/openfpga_flow/openfpga_shell_scripts/no_time_stamp_example_script.openfpga
@@ -27,7 +27,7 @@ build_fabric --compress_routing #--verbose
 
 # Write the fabric hierarchy of module graph to a file
 # This is used by hierarchical PnR flows
-write_fabric_hierarchy --file ${OPENFPGA_OUPUT_DIR}/mux_modules.yaml --depth 1 --module (grid|cbx|cby|sb)* --filter *mux*_size([0-9]+) --verbose --exclude_empty_modules
+write_fabric_hierarchy --file ${OPENFPGA_OUTPUT_DIR}/mux_modules.yaml --depth 1 --module (grid|cbx|cby|sb)* --filter *mux*_size([0-9]+) --verbose --exclude_empty_modules
 
 # Write the fabric I/O attributes to a file
 # This is used by pin constraint files
diff --git a/openfpga_flow/tasks/basic_tests/no_time_stamp/device_1x1/golden_outputs_no_time_stamp/mux_modules.yaml b/openfpga_flow/tasks/basic_tests/no_time_stamp/device_1x1/golden_outputs_no_time_stamp/mux_modules.yaml
new file mode 100644
index 000000000..5180e81ee
--- /dev/null
+++ b/openfpga_flow/tasks/basic_tests/no_time_stamp/device_1x1/golden_outputs_no_time_stamp/mux_modules.yaml
@@ -0,0 +1,24 @@
+sb_0__0_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_0__1_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_1__0_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_1__1_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+cbx_1__0_:
+  - mux_tree_tapbuf_size6
+cbx_1__1_:
+  - mux_tree_tapbuf_size6
+cby_0__1_:
+  - mux_tree_tapbuf_size6
+cby_1__1_:
+  - mux_tree_tapbuf_size6
diff --git a/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/mux_modules.yaml b/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/mux_modules.yaml
new file mode 100644
index 000000000..2d7d586c9
--- /dev/null
+++ b/openfpga_flow/tasks/basic_tests/no_time_stamp/device_4x4/golden_outputs_no_time_stamp/mux_modules.yaml
@@ -0,0 +1,55 @@
+sb_0__0_:
+  - mux_tree_tapbuf_size2
+sb_0__1_:
+  - mux_tree_tapbuf_size9
+  - mux_tree_tapbuf_size8
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_0__4_:
+  - mux_tree_tapbuf_size2
+sb_1__0_:
+  - mux_tree_tapbuf_size5
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size9
+  - mux_tree_tapbuf_size8
+  - mux_tree_tapbuf_size10
+sb_1__1_:
+  - mux_tree_tapbuf_size11
+  - mux_tree_tapbuf_size9
+  - mux_tree_tapbuf_size10
+  - mux_tree_tapbuf_size8
+sb_1__4_:
+  - mux_tree_tapbuf_size9
+  - mux_tree_tapbuf_size8
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_4__0_:
+  - mux_tree_tapbuf_size2
+sb_4__1_:
+  - mux_tree_tapbuf_size10
+  - mux_tree_tapbuf_size8
+  - mux_tree_tapbuf_size9
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_4__4_:
+  - mux_tree_tapbuf_size2
+cbx_1__0_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size2
+cbx_1__1_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size2
+cbx_1__4_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size2
+cby_0__1_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size2
+cby_1__1_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size2
+cby_4__1_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size2
diff --git a/openfpga_flow/tasks/basic_tests/no_time_stamp/dump_waveform/golden_outputs_no_time_stamp/mux_modules.yaml b/openfpga_flow/tasks/basic_tests/no_time_stamp/dump_waveform/golden_outputs_no_time_stamp/mux_modules.yaml
new file mode 100644
index 000000000..5180e81ee
--- /dev/null
+++ b/openfpga_flow/tasks/basic_tests/no_time_stamp/dump_waveform/golden_outputs_no_time_stamp/mux_modules.yaml
@@ -0,0 +1,24 @@
+sb_0__0_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_0__1_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_1__0_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+sb_1__1_:
+  - mux_tree_tapbuf_size4
+  - mux_tree_tapbuf_size3
+  - mux_tree_tapbuf_size2
+cbx_1__0_:
+  - mux_tree_tapbuf_size6
+cbx_1__1_:
+  - mux_tree_tapbuf_size6
+cby_0__1_:
+  - mux_tree_tapbuf_size6
+cby_1__1_:
+  - mux_tree_tapbuf_size6
diff --git a/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/mux_modules.yaml b/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/mux_modules.yaml
new file mode 100644
index 000000000..8ee171e0a
--- /dev/null
+++ b/openfpga_flow/tasks/basic_tests/no_time_stamp/no_cout_in_gsb/golden_outputs_no_time_stamp/mux_modules.yaml
@@ -0,0 +1,54 @@
+sb_0__0_:
+  - mux_2level_tapbuf_size2
+  - mux_2level_tapbuf_size3
+sb_0__1_:
+  - mux_2level_tapbuf_size9
+  - mux_2level_tapbuf_size8
+  - mux_2level_tapbuf_size3
+  - mux_2level_tapbuf_size4
+  - mux_2level_tapbuf_size2
+  - mux_2level_tapbuf_size7
+sb_0__2_:
+  - mux_2level_tapbuf_size2
+sb_1__0_:
+  - mux_2level_tapbuf_size5
+  - mux_2level_tapbuf_size4
+  - mux_2level_tapbuf_size3
+  - mux_2level_tapbuf_size2
+  - mux_2level_tapbuf_size10
+  - mux_2level_tapbuf_size9
+  - mux_2level_tapbuf_size11
+sb_1__1_:
+  - mux_2level_tapbuf_size13
+  - mux_2level_tapbuf_size9
+sb_1__2_:
+  - mux_2level_tapbuf_size9
+  - mux_2level_tapbuf_size7
+  - mux_2level_tapbuf_size4
+  - mux_2level_tapbuf_size3
+  - mux_2level_tapbuf_size2
+sb_2__0_:
+  - mux_2level_tapbuf_size3
+  - mux_2level_tapbuf_size2
+sb_2__1_:
+  - mux_2level_tapbuf_size11
+  - mux_2level_tapbuf_size9
+  - mux_2level_tapbuf_size10
+  - mux_2level_tapbuf_size4
+  - mux_2level_tapbuf_size2
+sb_2__2_:
+  - mux_2level_tapbuf_size3
+  - mux_2level_tapbuf_size2
+cbx_1__0_:
+  - mux_2level_tapbuf_size2
+  - mux_2level_tapbuf_size4
+cbx_1__1_:
+  - mux_2level_tapbuf_size2
+cbx_1__2_:
+  - mux_2level_tapbuf_size4
+cby_0__1_:
+  - mux_2level_tapbuf_size4
+cby_1__1_:
+  - mux_2level_tapbuf_size4
+cby_2__1_:
+  - mux_2level_tapbuf_size4

From e4998eebe0686a1dff7cb7f011a039b711152bd4 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 22:29:18 -0700
Subject: [PATCH 10/15] [doc] add new options for write_fabric_hierarchy

---
 .../openfpga_commands/setup_commands.rst          | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst b/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
index 9374971a4..f815705a0 100644
--- a/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
+++ b/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
@@ -359,11 +359,12 @@ add_fpga_core_to_fabric
 
     Show verbose log
 
+.. _openfpga_setup_commands_write_fabric_hierarchy:
 
 write_fabric_hierarchy
 ~~~~~~~~~~~~~~~~~~~~~~
 
-  Write the hierarchy of FPGA fabric graph to a plain-text file
+  Write the hierarchy of FPGA fabric graph to a YAML file
   
   .. option:: --file <string> or -f <string>
   
@@ -373,6 +374,18 @@ write_fabric_hierarchy
 
     Specify at which depth of the fabric module graph should the writer stop outputting. The root module start from depth 0. For example, if you want a two-level hierarchy, you should specify depth as 1. 
 
+  .. option:: --module <regexp>
+
+    Specify the root module name(s) which should be considered. By default, it is ``fpga_top``. Note that regular expression is supported. For example, ``grid_*`` will output all the modules with a prefix of ``grid_``
+
+  .. option:: --filter <regexp>
+
+    Specify the filter which allows user to select modules to appear under each root module tree. By default, it is ``*``. Regular expression is supported. For example, ``*mux*`` will output all the modules which contains ``mux``. In the other words, the filter defines a white list.
+
+  .. option:: --exclude_empty_modules
+
+    Exclude modules with no qualified children (match the names defined through filter) from the output file
+
   .. option:: --verbose
 
     Show verbose log

From f965595d17cabcd500e8317ba9d4f5525f86eb1f Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 22:37:07 -0700
Subject: [PATCH 11/15] [doc] add example file and file format details

---
 .../file_formats/fabric_hierarchy_file.rst    | 61 +++++++++++++++++++
 docs/source/manual/file_formats/index.rst     |  2 +
 .../openfpga_commands/setup_commands.rst      |  2 +-
 3 files changed, 64 insertions(+), 1 deletion(-)
 create mode 100644 docs/source/manual/file_formats/fabric_hierarchy_file.rst

diff --git a/docs/source/manual/file_formats/fabric_hierarchy_file.rst b/docs/source/manual/file_formats/fabric_hierarchy_file.rst
new file mode 100644
index 000000000..fb809ba87
--- /dev/null
+++ b/docs/source/manual/file_formats/fabric_hierarchy_file.rst
@@ -0,0 +1,61 @@
+.. _file_format_fabric_hierarchy_file:
+
+Fabric Hierarchy File (.yaml)
+----------------------------------------
+
+This file is generated by command :ref:`openfpga_setup_commands_write_fabric_hierarchy`
+
+
+The fabric hierarchy file aims to show module trees of a number of given roots
+
+This file is created for netlist manipulation and detailed floorplanning during physical design steps
+
+By using the options of the command :ref:`openfpga_setup_commands_write_fabric_hierarchy`, user can selectively output the module tree on their needs.
+
+An example of the file is shown as follows.
+
+.. code-block:: yaml
+
+  fpga_top:
+    tile_0__2_:
+      sb_0__1_:
+        mux_tree_tapbuf_size2:
+          INVTX1
+          const1
+          tap_buf4
+          mux_tree_tapbuf_basis_input2_mem1:
+            - TGATE
+        mux_tree_tapbuf_size2_feedthrough_mem
+        sb_1__config_group_mem_size40:
+          mux_tree_tapbuf_size2_mem:
+            - DFF
+    tile_1__2_:
+      grid_io_top:
+        logical_tile_io_mode_io_:
+          logical_tile_io_mode_physical__iopad:
+            - GPIO
+            - GPIO_feedthrough_DFF_mem
+          direct_interc
+
+In this example, the root module is ``fpga_top``.
+The child modules under ``fpga_top`` are ``tile_0__2_`` and ``tile_1__2_``.
+
+When multiple root modules are defined, the output could be
+
+.. code-block:: yaml
+
+  sb_0__1_:
+    - mux_tree_tapbuf_size2
+  sb_1__0_:
+    - mux_tree_tapbuf_size2
+  sb_1__1_:
+    - mux_tree_tapbuf_size2
+  cbx_1__0_:
+    - mux_tree_tapbuf_size4
+  cbx_1__1_:
+    - mux_tree_tapbuf_size4
+  cby_0__1_:
+    - mux_tree_tapbuf_size2
+    - mux_tree_tapbuf_size4
+  cby_1__1_:
+    - mux_tree_tapbuf_size4
diff --git a/docs/source/manual/file_formats/index.rst b/docs/source/manual/file_formats/index.rst
index 1038c6b81..e873286fd 100644
--- a/docs/source/manual/file_formats/index.rst
+++ b/docs/source/manual/file_formats/index.rst
@@ -43,3 +43,5 @@ OpenFPGA widely uses XML format for interchangeable files
    tile_config_file
 
    fabric_pin_physical_location_file
+
+   fabric_hierarchy_file
diff --git a/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst b/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
index f815705a0..ea2a20723 100644
--- a/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
+++ b/docs/source/manual/openfpga_shell/openfpga_commands/setup_commands.rst
@@ -368,7 +368,7 @@ write_fabric_hierarchy
   
   .. option:: --file <string> or -f <string>
   
-    Specify the file name to write the hierarchy. 
+    Specify the file name to write the hierarchy.  See details in :ref:`file_format_fabric_hierarchy_file`.
 
   .. option:: --depth <int>
 

From 79c5c0a26a3c085e3ecfef7f529acd74cd604e22 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 22:38:39 -0700
Subject: [PATCH 12/15] [doc] add more comments

---
 docs/source/manual/file_formats/fabric_hierarchy_file.rst | 1 +
 1 file changed, 1 insertion(+)

diff --git a/docs/source/manual/file_formats/fabric_hierarchy_file.rst b/docs/source/manual/file_formats/fabric_hierarchy_file.rst
index fb809ba87..0d717afd3 100644
--- a/docs/source/manual/file_formats/fabric_hierarchy_file.rst
+++ b/docs/source/manual/file_formats/fabric_hierarchy_file.rst
@@ -39,6 +39,7 @@ An example of the file is shown as follows.
 
 In this example, the root module is ``fpga_top``.
 The child modules under ``fpga_top`` are ``tile_0__2_`` and ``tile_1__2_``.
+Note that the leaf nodes are shown as a list, e.g., ``GPIO`` and ``GPIO_feedthrough_DFF_mem``.
 
 When multiple root modules are defined, the output could be
 

From f41a5e8b8960b3a17904ed2437045b402bf91aa8 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Thu, 2 May 2024 22:49:06 -0700
Subject: [PATCH 13/15] [core] fixed some bugs

---
 openfpga/src/fabric/fabric_hierarchy_writer.cpp | 15 +++++----------
 1 file changed, 5 insertions(+), 10 deletions(-)

diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index d94f2ff27..a07855a2b 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -108,18 +108,13 @@ static int rec_output_module_hierarchy_to_text_file(
     }
     if (hie_depth_to_stop == current_hie_depth || use_list) {
       fp << "- ";
-    }
-    fp << module_name_map.name(module_manager.module_name(child_module));
-
-    /* If this is the leaf node, we leave a new line
-     * Otherwise, we will leave a ':' to be compatible to YAML file format
-     */
-    if ((!module_manager.child_modules(child_module).empty()) &&
-        (hie_depth_to_stop >= current_hie_depth + 1)) {
+      fp << module_name_map.name(module_manager.module_name(child_module));
+      fp << "\n";
+    } else {
+      fp << module_name_map.name(module_manager.module_name(child_module));
       fp << ":";
+      fp << "\n";
     }
-    fp << "\n";
-
     /* Go to next level */
     int status = rec_output_module_hierarchy_to_text_file(
       fp, hie_depth_to_stop,

From c7501cb9b7ddade7d8598d4eff780362de3df474 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Fri, 3 May 2024 10:20:19 -0700
Subject: [PATCH 14/15] [core] fixed the bugs when there are module renaming

---
 .../src/fabric/fabric_hierarchy_writer.cpp    | 38 +++++++++++--------
 1 file changed, 23 insertions(+), 15 deletions(-)

diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index a07855a2b..803947518 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -24,8 +24,10 @@ static bool module_filter_all_children(const ModuleManager& module_manager,
   for (const ModuleId& child_module :
        module_manager.child_modules(curr_module)) {
     /* Filter out the names which do not match the pattern */
-    std::string child_module_name =
-      module_name_map.name(module_manager.module_name(child_module));
+    std::string child_module_name = module_manager.module_name(child_module);
+    if (module_name_map.name_exist(child_module_name)) {
+      child_module_name = module_name_map.name(child_module_name);
+    }
     std::string pattern = module_name_filter;
     std::regex star_replace("\\*");
     std::regex questionmark_replace("\\?");
@@ -71,8 +73,14 @@ static int rec_output_module_hierarchy_to_text_file(
       break;
     }
   }
+  /* For debug use only
   VTR_LOGV(verbose, "Current depth: %lu, Target depth: %lu\n",
            current_hie_depth, hie_depth_to_stop);
+  */
+  std::string parent_module_name = module_manager.module_name(parent_module);
+  if (module_name_map.name_exist(parent_module_name)) {
+    parent_module_name = module_name_map.name(parent_module_name);
+  }
   VTR_LOGV(
     use_list && verbose, "Use list as module '%s' contains only leaf nodes\n",
     module_name_map.name(module_manager.module_name(parent_module)).c_str());
@@ -90,8 +98,10 @@ static int rec_output_module_hierarchy_to_text_file(
     }
 
     /* Filter out the names which do not match the pattern */
-    std::string child_module_name =
-      module_name_map.name(module_manager.module_name(child_module));
+    std::string child_module_name = module_manager.module_name(child_module);
+    if (module_name_map.name_exist(child_module_name)) {
+      child_module_name = module_name_map.name(child_module_name);
+    }
     std::string pattern = module_name_filter;
     std::regex star_replace("\\*");
     std::regex questionmark_replace("\\?");
@@ -107,13 +117,9 @@ static int rec_output_module_hierarchy_to_text_file(
       return CMD_EXEC_FATAL_ERROR;
     }
     if (hie_depth_to_stop == current_hie_depth || use_list) {
-      fp << "- ";
-      fp << module_name_map.name(module_manager.module_name(child_module));
-      fp << "\n";
+      fp << "- " << child_module_name.c_str() << "\n";
     } else {
-      fp << module_name_map.name(module_manager.module_name(child_module));
-      fp << ":";
-      fp << "\n";
+      fp << child_module_name.c_str() << ":\n";
     }
     /* Go to next level */
     int status = rec_output_module_hierarchy_to_text_file(
@@ -173,8 +179,10 @@ int write_fabric_hierarchy_to_text_file(
   /* Use regular expression to capture the module whose name matches the pattern
    */
   for (ModuleId curr_module : module_manager.modules()) {
-    std::string curr_module_name =
-      module_name_map.name(module_manager.module_name(curr_module));
+    std::string curr_module_name = module_manager.module_name(curr_module);
+    if (module_name_map.name_exist(curr_module_name)) {
+      curr_module_name = module_name_map.name(curr_module_name);
+    }
     std::string pattern = root_module_names;
     std::regex star_replace("\\*");
     std::regex questionmark_replace("\\?");
@@ -191,6 +199,9 @@ int write_fabric_hierarchy_to_text_file(
                                    module_name_filter)) {
       continue;
     }
+    VTR_LOGV(
+      verbose, "Select module '%s' as root\n",
+      curr_module_name.c_str());
     /* Record current depth of module: top module is the root with 0 depth */
     size_t hie_depth = 0;
 
@@ -202,9 +213,6 @@ int write_fabric_hierarchy_to_text_file(
       fp, hie_depth_to_stop, hie_depth + 1, /* Start with level 1 */
       module_manager, curr_module, module_name_map, module_name_filter,
       verbose);
-    VTR_LOGV(
-      verbose, "Select module '%s' as root\n",
-      module_name_map.name(module_manager.module_name(curr_module)).c_str());
     /* Catch error code and exit if required */
     if (err_code == CMD_EXEC_FATAL_ERROR) {
       return err_code;

From 3d8107487cc0b51d1b878b42ff828457d75bd7b9 Mon Sep 17 00:00:00 2001
From: tangxifan <tangxifan@gmail.com>
Date: Fri, 3 May 2024 10:21:39 -0700
Subject: [PATCH 15/15] [core] code format

---
 openfpga/src/fabric/fabric_hierarchy_writer.cpp | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/openfpga/src/fabric/fabric_hierarchy_writer.cpp b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
index 803947518..6b24a4484 100644
--- a/openfpga/src/fabric/fabric_hierarchy_writer.cpp
+++ b/openfpga/src/fabric/fabric_hierarchy_writer.cpp
@@ -199,9 +199,7 @@ int write_fabric_hierarchy_to_text_file(
                                    module_name_filter)) {
       continue;
     }
-    VTR_LOGV(
-      verbose, "Select module '%s' as root\n",
-      curr_module_name.c_str());
+    VTR_LOGV(verbose, "Select module '%s' as root\n", curr_module_name.c_str());
     /* Record current depth of module: top module is the root with 0 depth */
     size_t hie_depth = 0;