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OpenFPGA
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Merge branch 'master' into dependabot/submodules/vtr-verilog-to-routing-d8def01

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tangxifan 2024-05-06 13:03:55 -07:00 committed by GitHub
parent 5959fd4877 0deaa7e897
commit 00959ab7e0
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11 changed files with 3 additions and 15 deletions
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8
docker/Dockerfile.env
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@ -6,10 +6,8 @@ RUN apt-get update && apt-get install --no-install-recommends software-propertie
ADD .github/workflows/install_dependencies_run_ubuntu22p04.sh install_dependencies_run.sh
RUN bash install_dependencies_run.sh
RUN curl https://bootstrap.pypa.io/get-pip.py -o get-pip.py
RUN python3.8 get-pip.py && rm get-pip.py
RUN update-alternatives --install /usr/bin/python3 python3 /usr/bin/python3.8 2
# Comment out this line since Ubuntu 20.04 does not support it
# RUN update-alternatives --install /usr/bin/python3 python3 /usr/bin/python3.6 1
RUN python3.10 get-pip.py && rm get-pip.py
RUN update-alternatives --install /usr/bin/python3 python3 /usr/bin/python3.10 2
ADD requirements.txt requirements.txt
ENV PYTHON_EXEC=python3.8
ENV PYTHON_EXEC=python3.10
RUN ${PYTHON_EXEC} -m pip install -r requirements.txt

1
openfpga_flow/regression_test_scripts/basic_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/basic_reg_yosys_only_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/fpga_bitstream_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/fpga_sdc_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/fpga_spice_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/fpga_verilog_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/iwls_benchmark_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/micro_benchmark_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/quicklogic_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################

1
openfpga_flow/regression_test_scripts/vtr_benchmark_reg_test.sh
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@ -2,7 +2,6 @@
set -e
source openfpga.sh
PYTHON_EXEC=python3.8
###############################################
# OpenFPGA Shell with VPR8
##############################################