diff --git a/openfpga_flow/tasks/benchmark_sweep/signal_gen/config/task.conf b/openfpga_flow/tasks/benchmark_sweep/signal_gen/config/task.conf
index c6306d7da..9ada9e960 100644
--- a/openfpga_flow/tasks/benchmark_sweep/signal_gen/config/task.conf
+++ b/openfpga_flow/tasks/benchmark_sweep/signal_gen/config/task.conf
@@ -27,18 +27,18 @@ arch0=${PATH:OPENFPGA_PATH}/openfpga_flow/vpr_arch/k4_N4_tileable_40nm.xml
 
 [BENCHMARKS]
 bench0=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/micro_benchmark/signal_gen/clock_divider.v
-# bench1=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/micro_benchmark/signal_gen/pulse_generator.v
-# bench2=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/micro_benchmark/signal_gen/reset_generator.v
+bench1=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/micro_benchmark/signal_gen/pulse_generator.v
+bench2=${PATH:OPENFPGA_PATH}/openfpga_flow/benchmarks/micro_benchmark/signal_gen/reset_generator.v
 
 [SYNTHESIS_PARAM]
 bench0_top = clock_divider
 bench0_chan_width = 300
 
-# bench1_top = pulse_generator
-# bench1_chan_width = 300
+bench1_top = pulse_generator
+bench1_chan_width = 300
 
-# bench2_top = reset_generator
-# bench2_chan_width = 300
+bench2_top = reset_generator
+bench2_chan_width = 300
 
 [SCRIPT_PARAM_MIN_ROUTE_CHAN_WIDTH]
 end_flow_with_test=