OpenFPGA/yosys/manual/PRESENTATION_ExOth/scrambler.ys

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read_verilog scrambler.v
hierarchy; proc;;
cd scrambler
submod -name xorshift32 xs %c %ci %D %c %ci:+[D] %D %ci*:-$dff xs %co %ci %d
cd ..
show -prefix scrambler_p01 -format pdf -notitle scrambler
show -prefix scrambler_p02 -format pdf -notitle xorshift32
echo on
cd xorshift32
rename n2 in
rename n1 out
eval -set in 1 -show out
eval -set in 270369 -show out
sat -set out 632435482