124 lines
5.1 KiB
C
124 lines
5.1 KiB
C
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/***********************************/
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/* SPICE Modeling for VPR */
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/* Xifan TANG, EPFL/LSI */
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/***********************************/
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/* Include SPICE support headers*/
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#include <stdio.h>
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#include "spice_types.h"
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#include "linkedlist.h"
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#include "fpga_x2p_globals.h"
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#include "spice_globals.h"
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/* Threshold of max transistor width for each transistor */
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float max_width_per_trans = 5.;
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char* spice_netlist_file_postfix = ".sp";
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char* nmos_subckt_name = "vpr_nmos";
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char* pmos_subckt_name = "vpr_pmos";
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char* io_nmos_subckt_name = "vpr_io_nmos";
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char* io_pmos_subckt_name = "vpr_io_pmos";
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char* cpt_subckt_name = "cpt";
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char* mux_basis_posfix = "_basis";
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char* mux_special_basis_posfix = "_special_basis";
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char* nmos_pmos_spice_file_name = "nmos_pmos.sp";
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char* basics_spice_file_name = "inv_buf_trans_gate.sp";
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char* muxes_spice_file_name = "muxes.sp";
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char* rram_veriloga_file_name = "rram_behavior.va";
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char* wires_spice_file_name = "wires.sp";
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char* logic_block_spice_file_name = "grid_header.sp";
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char* luts_spice_file_name = "luts.sp";
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char* routing_spice_file_name = "routing_header.sp";
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char* meas_header_file_name = "meas_params.sp";
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char* stimu_header_file_name = "stimulate_params.sp";
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char* design_param_header_file_name = "design_params.sp";
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/* Prefix for subckt SPICE netlists */
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char* grid_spice_file_name_prefix = "grid_";
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char* chanx_spice_file_name_prefix = "chanx_";
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char* chany_spice_file_name_prefix = "chany_";
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char* sb_spice_file_name_prefix = "sb_";
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char* cbx_spice_file_name_prefix = "cbx_";
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char* cby_spice_file_name_prefix = "cby_";
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/* Postfix for circuit design parameters */
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char* design_param_postfix_input_buf_size = "_input_buf_size";
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char* design_param_postfix_output_buf_size = "_output_buf_size";
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char* design_param_postfix_pass_gate_logic_pmos_size = "_pgl_pmos_size";
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char* design_param_postfix_pass_gate_logic_nmos_size = "_pgl_nmos_size";
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char* design_param_postfix_wire_param_res_val = "_wire_param_res_val";
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char* design_param_postfix_wire_param_cap_val = "_wire_param_cap_val";
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char* design_param_postfix_rram_ron = "_rram_ron";
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char* design_param_postfix_rram_roff = "_rram_roff";
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char* design_param_postfix_rram_wprog_set_pmos = "_rram_wprog_set_pmos";
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char* design_param_postfix_rram_wprog_set_nmos = "_rram_wprog_set_nmos";
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char* design_param_postfix_rram_wprog_reset_pmos = "_rram_wprog_reset_pmos";
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char* design_param_postfix_rram_wprog_reset_nmos = "_rram_wprog_reset_nmos";
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/* Testbench names */
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char* spice_top_testbench_postfix = "_top.sp";
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char* spice_grid_testbench_postfix = "_grid_testbench.sp";
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char* spice_pb_mux_testbench_postfix = "_pbmux_testbench.sp";
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char* spice_cb_mux_testbench_postfix = "_cbmux_testbench.sp";
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char* spice_sb_mux_testbench_postfix = "_sbmux_testbench.sp";
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char* spice_cb_testbench_postfix = "_cb_testbench.sp";
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char* spice_sb_testbench_postfix = "_sb_testbench.sp";
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char* spice_lut_testbench_postfix = "_lut_testbench.sp";
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char* spice_dff_testbench_postfix = "_dff_testbench.sp";
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char* spice_hardlogic_testbench_postfix = "_hardlogic_testbench.sp";
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char* spice_io_testbench_postfix = "_io_testbench.sp";
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/* SRAM SPICE MODEL should be set as global*/
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t_spice_model* sram_spice_model = NULL;
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enum e_sram_orgz sram_spice_orgz_type = SPICE_SRAM_STANDALONE;
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t_sram_orgz_info* sram_spice_orgz_info = NULL;
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/* Input and Output Pad spice model. should be set as global */
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t_spice_model* iopad_spice_model = NULL;
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/* Global counters */
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int rram_design_tech = 0;
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int num_used_grid_mux_tb = 0;
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int num_used_grid_tb = 0;
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int num_used_cb_tb = 0;
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int num_used_sb_tb = 0;
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int num_used_cb_mux_tb = 0;
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int num_used_sb_mux_tb = 0;
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int num_used_lut_tb = 0;
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int num_used_hardlogic_tb = 0;
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int num_used_io_tb = 0;
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/* linked-list for all the testbenches */
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t_llist* tb_head = NULL;
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/* Linked-list that stores submodule Verilog file mames */
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t_llist* grid_spice_subckt_file_path_head = NULL;
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t_llist* routing_spice_subckt_file_path_head = NULL;
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/* linked-list for heads of scan-chain */
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t_llist* scan_chain_heads = NULL;
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/* Name of global ports used in all netlists */
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char* spice_tb_global_vdd_port_name = "gvdd";
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char* spice_tb_global_gnd_port_name = "ggnd";
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char* spice_tb_global_config_done_port_name = "gconfig_done";
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char* spice_tb_global_set_port_name = "gset";
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char* spice_tb_global_reset_port_name = "greset";
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char* spice_tb_global_vdd_localrouting_port_name = "gvdd_local_interc";
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char* spice_tb_global_vdd_direct_port_name = "gvdd_direct_interc";
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char* spice_tb_global_vdd_io_port_name = "gvdd_io";
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char* spice_tb_global_vdd_hardlogic_port_name = "gvdd_hardlogic";
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char* spice_tb_global_vdd_sram_port_name = "gvdd_sram";
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char* spice_tb_global_vdd_lut_sram_port_name = "gvdd_sram_luts";
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char* spice_tb_global_vdd_localrouting_sram_port_name = "gvdd_sram_local_routing";
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char* spice_tb_global_vdd_io_sram_port_name = "gvdd_sram_io";
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char* spice_tb_global_vdd_hardlogic_sram_port_name = "gvdd_sram_hardlogic";
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char* spice_tb_global_vdd_cb_sram_port_name = "gvdd_sram_cbs";
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char* spice_tb_global_vdd_sb_sram_port_name = "gvdd_sram_sbs";
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char* spice_tb_global_clock_port_name = "gclock";
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char* spice_tb_global_vdd_load_port_name = "gvdd_load";
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char* spice_tb_global_port_inv_postfix = "_inv";
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int spice_sim_multi_thread_num = 8;
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