riscv
/
OpenFPGA
mirror of https://github.com/lnis-uofu/OpenFPGA.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
OpenFPGA/yosys/tests/asicworld/README

2 lines
59 B
Plaintext
Raw Normal View History

Add Yosys and update flow_flow Perl Script
2018-11-30 22:14:43 -06:00
Borrowed Verilog examples from http://www.asic-world.com/.