49 lines
1.8 KiB
ReStructuredText
49 lines
1.8 KiB
ReStructuredText
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.. _file_format_pin_table_file:
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Pin Table File (.csv)
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.. note:: This file is typically a spreadsheet provided by FPGA vendors. Please contact your vendor for the exact file.
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.. note:: OpenFPGA will not include or guarantee the correctness of the file!!!
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The pin table file is the file which describes the pin mapping between a chip and an FPGA inside the chip.
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An example of the file is shown as follows.
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.. code-block:: xml
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orientation,row,col,pin_num_in_cell,port_name,mapped_pin,GPIO_type,Associated Clock,Clock Edge
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TOP,,,,gfpga_pad_IO_A2F[0],pad_fpga_io[0],,,
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TOP,,,,gfpga_pad_IO_F2A[0],pad_fpga_io[0],,,
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TOP,,,,gfpga_pad_IO_A2F[4],pad_fpga_io[1],,,
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TOP,,,,gfpga_pad_IO_F2A[4],pad_fpga_io[1],,,
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TOP,,,,gfpga_pad_IO_A2F[8],pad_fpga_io[2],,,
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TOP,,,,gfpga_pad_IO_F2A[8],pad_fpga_io[2],,,
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TOP,,,,gfpga_pad_IO_A2F[31],pad_fpga_io[3],,,
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TOP,,,,gfpga_pad_IO_F2A[31],pad_fpga_io[3],,,
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RIGHT,,,,gfpga_pad_IO_A2F[32],pad_fpga_io[4],,,
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RIGHT,,,,gfpga_pad_IO_F2A[32],pad_fpga_io[4],,,
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RIGHT,,,,gfpga_pad_IO_A2F[40],pad_fpga_io[5],,,
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RIGHT,,,,gfpga_pad_IO_F2A[40],pad_fpga_io[5],,,
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BOTTOM,,,,gfpga_pad_IO_A2F[64],pad_fpga_io[6],,,
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BOTTOM,,,,gfpga_pad_IO_F2A[64],pad_fpga_io[6],,,
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LEFT,,,,gfpga_pad_IO_F2A[127],pad_fpga_io[7],,,
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LEFT,,,,gfpga_pad_IO_A2F[127],pad_fpga_io[7],,,
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An pin table may serve in various purposes. However, for OpenFPGA, the following attributes are required
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.. option:: orientation
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Specify on which side the pin locates
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.. option:: port_name
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Specify the port name of the FPGA fabric
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.. option:: mapped_pin
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Specify the pin name of the FPGA chip
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.. warning:: Currently, the direction of the port is inferred by the ``port_name``. A postfix of ``A2F`` indicates an input port, while a postfix of ``F2A`` indicates an output port.
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