79 lines
1.5 KiB
Coq
79 lines
1.5 KiB
Coq
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////////////////////////////////////////////////////////
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// //
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// Benchmark using all modes of k8 architecture //
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// //
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////////////////////////////////////////////////////////
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`timescale 1 ns/ 1 ps
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module test_modes(
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clk,
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a_0,
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a_1,
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a_2,
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a_3,
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b_0,
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b_1,
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b_2,
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b_3,
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cin,
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e,
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f,
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g,
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sum_0,
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sum_1,
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sum_2,
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sum_3,
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cout,
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x,
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y,
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z );
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input wire clk, a_0, a_1, a_2, a_3, b_0, b_1, b_2, b_3, cin, e, f, g;
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output reg sum_0, sum_1, sum_2, sum_3, cout;
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output wire x, y, z;
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wire d0;
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wire [4:0] n0;
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wire [3:0] a, b;
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reg reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9, reg10, reg11, reg_a_0, reg_a_1, reg_a_2, reg_a_3, reg_b_0, reg_b_1, reg_b_2, reg_b_3, reg_cin;
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assign a = {reg_a_3, reg_a_2, reg_a_1, reg_a_0};
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assign b = {reg_b_3, reg_b_2, reg_b_1, reg_b_0};
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assign d0 = (e && g) || !f;
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assign n0 = a + b + reg_cin;
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assign x = reg3;
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assign y = reg7;
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assign z = reg11;
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always @(posedge clk) begin
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reg0 <= d0;
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reg1 <= reg0;
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reg2 <= reg1;
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reg3 <= reg2;
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reg4 <= reg3;
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reg5 <= reg4;
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reg6 <= reg5;
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reg7 <= reg6;
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reg8 <= reg7;
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reg9 <= reg8;
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reg10 <= reg9;
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reg11 <= reg10;
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reg_a_0 <= a_0;
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reg_a_1 <= a_1;
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reg_a_2 <= a_2;
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reg_a_3 <= a_3;
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reg_b_0 <= b_0;
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reg_b_1 <= b_1;
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reg_b_2 <= b_2;
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reg_b_3 <= b_3;
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reg_cin <= cin;
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sum_0 <= n0[0];
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sum_1 <= n0[1];
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sum_2 <= n0[2];
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sum_3 <= n0[3];
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cout <= n0[4];
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end
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endmodule
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