53 lines
1.9 KiB
C
53 lines
1.9 KiB
C
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/*********************************************************************
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* The following code is part of the power modelling feature of VTR.
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*
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* For support:
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* http://code.google.com/p/vtr-verilog-to-routing/wiki/Power
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*
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* or email:
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* vtr.power.estimation@gmail.com
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*
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* If you are using power estimation for your researach please cite:
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*
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* Jeffrey Goeders and Steven Wilton. VersaPower: Power Estimation
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* for Diverse FPGA Architectures. In International Conference on
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* Field Programmable Technology, 2012.
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*
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********************************************************************/
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/* This file provides functions used to verify the power estimations
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* againt SPICE.
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*/
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#ifndef __POWER_MISC_H__
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#define __POWER_MISC_H__
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/************************* INCLUDES *********************************/
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#include "power.h"
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/************************* DEFINES **********************************/
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const float power_callib_period = 5e-9;
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/************************* STRUCTS **********************************/
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/************************* ENUMS ************************************/
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typedef enum {
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POWER_CALLIB_COMPONENT_BUFFER = 0,
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POWER_CALLIB_COMPONENT_BUFFER_WITH_LEVR,
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POWER_CALLIB_COMPONENT_FF,
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POWER_CALLIB_COMPONENT_MUX,
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POWER_CALLIB_COMPONENT_LUT,
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POWER_CALLIB_COMPONENT_MAX
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} e_power_callib_component;
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/************************* FUNCTION DECLARATIONS ********************/
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void power_print_spice_comparison(void);
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void power_callibrate(void);
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float power_usage_buf_for_callibration(int num_inputs, float transistor_size);
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float power_usage_buf_levr_for_callibration(int num_inputs,
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float transistor_size);
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float power_usage_mux_for_callibration(int num_inputs, float transistor_size);
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float power_usage_lut_for_callibration(int num_inputs, float transistor_size);
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float power_usage_ff_for_callibration(int num_inputs, float transistor_size);
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#endif
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