26 lines
909 B
C
26 lines
909 B
C
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/* Netlist to be placed stuff. */
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int num_nets, num_blocks;
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struct s_net *net;
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struct s_block *block;
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boolean *is_global;
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/* Physical FPGA architecture stuff */
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int nx, ny;
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/* chan_width_x is the x-directed channel; i.e. between rows */
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int *chan_width_x, *chan_width_y; /* numerical form */
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struct s_grid_tile **grid;
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/* [0..num_nets-1] of linked list start pointers. Defines the routing. */
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struct s_trace **trace_head, **trace_tail;
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/* Structures to define the routing architecture of the FPGA. */
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int num_rr_nodes;
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t_rr_node *rr_node; /* [0..num_rr_nodes-1] */
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t_ivec ***rr_node_indices;
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int num_rr_indexed_data;
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t_rr_indexed_data *rr_indexed_data; /* [0 .. num_rr_indexed_data-1] */
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int **net_rr_terminals; /* [0..num_nets-1][0..num_pins-1] */
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struct s_switch_inf *switch_inf; /* [0..det_routing_arch.num_switch-1] */
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int **rr_blk_source; /* [0..num_blocks-1][0..num_class-1] */
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