34 lines
1.1 KiB
Plaintext
34 lines
1.1 KiB
Plaintext
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#VPR compatible SDC file for benchmark 'bitcoin_miner'
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#*******************************
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# set_time_format
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#*******************************
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# Unsuported by VPR
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#*******************************
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# create_clock
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#*******************************
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create_clock -period 1.0 -name virtual_io_clock
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create_clock -period 1.0 {pll:pll_inst|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]}
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create_clock -period 1.0 OSC_CLK
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#*******************************
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# set_clock_uncertainty
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#*******************************
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# Unsupported by VPR. VPR does not model clock uncertainty.
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#*******************************
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# set_input_delay
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#*******************************
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set_input_delay -clock virtual_io_clock -max 0.0 [get_ports *]
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#*******************************
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# set_output_delay
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#*******************************
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set_output_delay -clock virtual_io_clock -max 0.0 [get_ports *]
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#*******************************
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# set_clock_groups
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#*******************************
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set_clock_groups -exclusive -group { pll:pll_inst|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0] } -group { OSC_CLK }
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