220 lines
8.6 KiB
Python
220 lines
8.6 KiB
Python
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import os
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import shutil
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import time
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import shlex
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import argparse
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from configparser import ConfigParser, ExtendedInterpolation
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import logging
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import glob
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import subprocess
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import threading
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from string import Template
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# # Configure logging system
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logging.basicConfig(level=logging.INFO,
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format='%(levelname)s (%(threadName)-9s) - %(message)s')
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logger = logging.getLogger('OpenFPGA_Task_logs')
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# # Reading command line arguments
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parser = argparse.ArgumentParser()
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parser.add_argument('tasks', nargs='+')
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parser.add_argument('--maxthreads',
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type=int,
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default=2,
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help="Number of fpga_flow threads to run " +
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"default = 2, Typically <= Number of processors on the system")
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parser.add_argument('--config', help="script configuration file")
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args = parser.parse_args()
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# # Reading configuration file to get all the paths
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# # Replace variables in the file with absolute paths
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task_script_dir = os.path.dirname(os.path.abspath(__file__))
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script_env_vars = ({"PATH": {
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"OPENFPGA_FLOW_PATH": task_script_dir,
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"OPENFPGA_PATH": os.path.abspath(os.path.join(task_script_dir, os.pardir, os.pardir))
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}})
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config = ConfigParser(interpolation=ExtendedInterpolation())
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config.read_dict(script_env_vars)
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config.read_file(open(os.path.join(task_script_dir, 'run_fpga_task.conf')))
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gc = config["GENERAL CONFIGURATION"]
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def main():
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# processors = os.cpu_count()
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task_action = []
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for eachtask in args.tasks:
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logger.info("Currently running task %s" % eachtask)
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task_action += generate_single_task_actions(eachtask)
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run_actions(task_action)
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logger.info("Task execution completed")
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exit()
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# =================================
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# # Subroutines start here
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# =================================
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def clean_up_and_exit(msg):
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logger.error(msg)
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logger.error("Existing . . . . . .")
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exit()
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def generate_single_task_actions(taskname):
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"""
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This script generates all the scripts required for each benchmark
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"""
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curr_task_dir = os.path.join(gc["task_dir"], taskname)
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if not os.path.isdir(curr_task_dir):
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clean_up_and_exit("Task directory not found")
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os.chdir(curr_task_dir)
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curr_task_conf_file = os.path.join(curr_task_dir, "config", "task.conf")
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if not os.path.isfile(curr_task_conf_file):
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clean_up_and_exit(
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"Missing configuration file for task %s" % curr_task_dir)
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task_conf = ConfigParser(allow_no_value=True,
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interpolation=ExtendedInterpolation())
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task_conf.optionxform = str
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task_conf.read_dict(script_env_vars)
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task_conf.read_file(open(curr_task_conf_file))
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# Check required sections in config file
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required_sec = ["GENERAL", "BENCHMARKS", "ARCHITECTURES", "POST_RUN"]
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missing_section = list(set(required_sec)-set(task_conf.sections()))
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if missing_section:
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clean_up_and_exit(
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"Missing section %s in task configuration file" % " ".join(missing_section))
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benchmark_list = []
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for _, bench_file in task_conf["BENCHMARKS"].items():
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if(glob.glob(bench_file)):
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benchmark_list.append(bench_file)
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else:
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logger.warning(
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"File Not Found: Skipping %s benchmark " % bench_file)
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# Check if all benchmark/architecture files exits
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archfile_list = []
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for _, arch_file in task_conf["ARCHITECTURES"].items():
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arch_full_path = arch_file
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if os.path.isfile(arch_full_path):
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archfile_list.append(arch_full_path)
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else:
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logger.warning(
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"File Not Found: Skipping %s architecture " % arch_file)
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script_list = []
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for eacharch in archfile_list:
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script_list.append(create_run_script(gc["temp_run_dir"],
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eacharch,
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benchmark_list,
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task_conf["GENERAL"]["power_tech_file"],
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task_conf["SCRIPT_PARAM"]))
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return script_list
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def create_run_script(task_run_dir, archfile, benchmark_list, power_tech_file, additional_fpga_flow_params):
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"""
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Create_run_script function accespts run directory, architecture list and
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fpga_flow configuration file and prepare final executable fpga_flow script
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TODO : Replace this section after convert fpga_flow to python script
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Config file creation and bechnmark list can be skipped
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"""
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# = = = = = = = = = File/Directory Consitancy Check = = = = = = = = = =
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if not os.path.isdir(gc["misc_dir"]):
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clean_up_and_exit("Miscellaneous directory does not exist")
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fpga_flow_script = os.path.join(gc["misc_dir"], "fpga_flow_template.sh")
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if not os.path.isfile(fpga_flow_script):
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clean_up_and_exit("Missing fpga_flow script template %s" %
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fpga_flow_script)
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fpga_flow_conf_tmpl = os.path.join(gc["misc_dir"], "fpga_flow_script.conf")
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if not os.path.isfile(fpga_flow_conf_tmpl):
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clean_up_and_exit("fpga_flow configuration tempalte is missing %s" %
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fpga_flow_conf_tmpl)
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# = = = = = = = = = = = = Create execution folder = = = = = = = = = = = =
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# TODO : this directory should change as <architecture>/<benchmark>/{conf_opt}
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curr_job_dir = os.path.join(task_run_dir, "tmp")
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if os.path.isdir(curr_job_dir):
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shutil.rmtree(curr_job_dir)
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os.makedirs(curr_job_dir)
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os.chdir(curr_job_dir)
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# = = = = = = = = = = = Create config file= = = = = = = = = = = = = = = =
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fpga_flow_conf = ConfigParser(
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strict=False,
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interpolation=ExtendedInterpolation())
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fpga_flow_conf.read_dict(script_env_vars)
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fpga_flow_conf.read_file(open(fpga_flow_conf_tmpl))
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# HACK: Find better way to resolve all interpolations in the script and write back
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for eachSection in fpga_flow_conf:
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for eachkey in fpga_flow_conf[eachSection].keys():
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fpga_flow_conf[eachSection][eachkey] = fpga_flow_conf.get(
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eachSection, eachkey)
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# Update configuration file with script realated parameters
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fpga_flow_conf["flow_conf"]["vpr_arch"] = archfile
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fpga_flow_conf["flow_conf"]["power_tech_xml"] = power_tech_file
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# Remove extra path section and create configuration file
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fpga_flow_conf.remove_section("PATH")
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with open("openfpga_job.conf", 'w') as configfile:
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fpga_flow_conf.write(configfile)
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# = = = = = = = = = = = Create Benchmark List file = = = = = = = = = = = =
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# TODO: This script strips common path from bechmark list and add
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# only single directory and filename to benchmarklist file
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# This can be imporoved by modifying fpga_flow script
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with open("openfpga_benchmark_list.txt", 'w') as configfile:
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configfile.write("# Circuit Names, fixed routing channel width\n")
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for eachBenchMark in benchmark_list:
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configfile.write(eachBenchMark.replace(
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fpga_flow_conf["dir_path"]["benchmark_dir"], ""))
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configfile.write(",30")
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configfile.write("\n")
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# = = = = = = = = = Create fpga_flow_shell Script = = = = = = = = = = = =
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d = {
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"fpga_flow_script": shlex.quote(gc["script_default"]),
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"conf_file": shlex.quote(os.path.join(os.getcwd(), "openfpga_job.conf")),
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"benchmark_list_file": shlex.quote(os.path.join(os.getcwd(), "openfpga_benchmark_list.txt")),
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"csv_rpt_file": shlex.quote(os.path.join(os.getcwd(), os.path.join(gc["csv_rpt_dir"], "fpga_flow.csv"))),
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"verilog_output_path": shlex.quote(os.path.join(os.getcwd(), gc["verilog_output_path"])),
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"additional_params": " \\\n ".join(["-%s %s" % (key, value or "") for key, value in additional_fpga_flow_params.items()])
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}
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result = Template(open(fpga_flow_script).read()).substitute(d)
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fpga_flow_script_path = os.path.join(os.getcwd(), "openfpga_flow.sh")
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with open(fpga_flow_script_path, 'w') as configfile:
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configfile.write(result)
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return fpga_flow_script_path
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def run_single_script(s, script_path):
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logging.debug('Waiting to join the pool')
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with s:
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name = threading.currentThread().getName()
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subprocess.run(["bash", script_path], stdout=subprocess.PIPE)
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logging.info("%s Finished " % name)
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def run_actions(actions):
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thread_sema = threading.Semaphore(args.maxthreads)
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thred_list = []
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for index, eachAction in enumerate(actions):
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t = threading.Thread(target=run_single_script,
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name='benchmark_' + str(index),
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args=(thread_sema, eachAction))
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t.start()
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thred_list.append(t)
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for eachthread in thred_list:
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eachthread.join()
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if __name__ == "__main__":
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main()
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