110 lines
2.7 KiB
Python
110 lines
2.7 KiB
Python
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"""
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=========================================
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Represetes IO Sequence in OpenFPGA Engine
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=========================================
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This example demonstrates the ``OpenFPGA_Arch`` class which parses the
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`VPR` and `OpenFPGA` Architecture file and provides logical information.
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.. image:: ../../../examples/OpenFPGA_basic/_sample_io_sequence.svg
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:width: 60%
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:align: center
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Author: Ganesh Gore
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"""
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import math
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import svgwrite
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from svgwrite.container import Group
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def draw_connections(width, height, connections):
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"""
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Draw connection sequence
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"""
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dwg = svgwrite.Drawing()
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DRAW_WIDTH = (width + 2) * SCALE
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DRAW_HEIGHT = (height + 2) * SCALE
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# set user coordinate space
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dwg.viewbox(width=DRAW_WIDTH, height=DRAW_HEIGHT, miny=-1 * DRAW_HEIGHT)
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dwg_main = Group(id="Main", transform="scale(1,-1)")
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dwg.add(dwg_main)
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for w in range(1, width + 2):
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dwg_main.add(
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dwg.line(
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(w * SCALE, SCALE), (w * SCALE, (height + 1) * SCALE), stroke="red"
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)
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)
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for h in range(1, height + 2):
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dwg_main.add(
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dwg.line((SCALE, h * SCALE), ((width + 1) * SCALE, h * SCALE), stroke="red")
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)
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path = "M "
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for point in connections:
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path += " %d %d " % ((point[0] + 0.5) * SCALE, (point[1] + 0.5) * SCALE)
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dwg_main.add(dwg.path(path, stroke="blue", fill="none", stroke_width="2px"))
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dwg.saveas("_sample_io_sequence.svg", pretty=True)
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SCALE = 20
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FPGA_WIDTH = 40
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FPGA_HEIGHT = 15
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W = max(FPGA_WIDTH, FPGA_HEIGHT)
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W2 = math.floor(W / 2) + 1
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connections = []
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xmin, xmax = 1, FPGA_WIDTH
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ymin, ymax = 1, FPGA_HEIGHT
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while (xmin < xmax) and (ymin < ymax):
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print(xmin, ymin, end=" -> ")
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print(xmax, ymax)
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x = xmin
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for y in range(ymin, ymax + 1):
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connections.append((x, y))
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y = ymax
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for x in range(xmin, xmax + 1):
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connections.append((x, y))
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x = xmax
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for y in range(ymin, ymax + 1)[::-1]:
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connections.append((x, y))
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y = ymin
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for x in range(xmin, xmax + 1)[::-1][:-1]:
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connections.append((x, y))
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xmin += 1
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ymin += 1
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xmax -= 1
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ymax -= 1
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if FPGA_HEIGHT % 2 == 1: # if height is odd
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if ymin == ymax: # if touching vertically
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y = ymin
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for x in range(xmin, xmax + 1):
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connections.append((x, y))
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if FPGA_WIDTH % 2 == 1: # if width is odd
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if xmin == xmax: # if touching horizontally
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x = xmin
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for y in range(ymin, ymax + 1):
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connections.append((x, y))
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# print(connections)
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if connections:
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draw_connections(FPGA_WIDTH, FPGA_HEIGHT, connections)
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else:
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# Dummy draw
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draw_connections(FPGA_WIDTH, FPGA_HEIGHT, [(1, 1)])
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