OpenFPGA/fpga_flow/benchmarks/Blif/FPGA_SPICE_bench/ss_pcm.blif

# Benchmark "ss_pcm" written by ABC on Mon Aug 29 15:33:12 2005
.model ss_pcm
.inputs clk rst pcm_clk_i pcm_sync_i pcm_din_i re_i ssel[0] ssel[1] ssel[2] \
 din_i[0] din_i[1] din_i[2] din_i[3] din_i[4] din_i[5] din_i[6] din_i[7] \
 we_i[0] we_i[1]
.outputs pcm_dout_o dout_o[0] dout_o[1] dout_o[2] dout_o[3] dout_o[4] \
 dout_o[5] dout_o[6] dout_o[7]

.latch \tx_hold_reg_reg[15]_in \tx_hold_reg_reg[15]  2
.latch \tx_hold_reg_reg[1]_in \tx_hold_reg_reg[1]  2
.latch \tx_hold_reg_reg[2]_in \tx_hold_reg_reg[2]  2
.latch \tx_hold_reg_reg[3]_in \tx_hold_reg_reg[3]  2
.latch \tx_hold_reg_reg[4]_in \tx_hold_reg_reg[4]  2
.latch \tx_hold_reg_reg[5]_in \tx_hold_reg_reg[5]  2
.latch \tx_hold_reg_reg[6]_in \tx_hold_reg_reg[6]  2
.latch \tx_hold_reg_reg[7]_in \tx_hold_reg_reg[7]  2
.latch \tx_hold_reg_reg[8]_in \tx_hold_reg_reg[8]  2
.latch \tx_hold_reg_reg[9]_in \tx_hold_reg_reg[9]  2
.latch \tx_hold_reg_reg[11]_in \tx_hold_reg_reg[11]  2
.latch \tx_hold_reg_reg[12]_in \tx_hold_reg_reg[12]  2
.latch \tx_hold_reg_reg[13]_in \tx_hold_reg_reg[13]  2
.latch \tx_hold_reg_reg[14]_in \tx_hold_reg_reg[14]  2
.latch \tx_hold_reg_reg[0]_in \tx_hold_reg_reg[0]  2
.latch tx_go_reg_in  tx_go_reg  2
.latch \tx_hold_reg_reg[10]_in \tx_hold_reg_reg[10]  2
.latch \rx_reg_reg[13]_in \rx_reg_reg[13]  2
.latch \rx_reg_reg[14]_in \rx_reg_reg[14]  2
.latch \rx_reg_reg[15]_in \rx_reg_reg[15]  2
.latch \rx_reg_reg[1]_in \rx_reg_reg[1]  2
.latch \rx_reg_reg[2]_in \rx_reg_reg[2]  2
.latch \rx_reg_reg[3]_in \rx_reg_reg[3]  2
.latch \rx_reg_reg[4]_in \rx_reg_reg[4]  2
.latch \rx_reg_reg[5]_in \rx_reg_reg[5]  2
.latch \rx_reg_reg[6]_in \rx_reg_reg[6]  2
.latch \rx_reg_reg[7]_in \rx_reg_reg[7]  2
.latch \rx_reg_reg[8]_in \rx_reg_reg[8]  2
.latch \rx_reg_reg[9]_in \rx_reg_reg[9]  2
.latch \rx_reg_reg[0]_in \rx_reg_reg[0]  2
.latch \rx_reg_reg[12]_in \rx_reg_reg[12]  2
.latch \rx_reg_reg[10]_in \rx_reg_reg[10]  2
.latch \rx_reg_reg[11]_in \rx_reg_reg[11]  2
.latch \tx_cnt_reg[3]_in \tx_cnt_reg[3]  2
.latch \tx_cnt_reg[2]_in \tx_cnt_reg[2]  2
.latch \tx_cnt_reg[0]_in \tx_cnt_reg[0]  2
.latch \tx_cnt_reg[1]_in \tx_cnt_reg[1]  2
.latch \rx_hold_reg_reg[8]_in \rx_hold_reg_reg[8]  2
.latch \rx_hold_reg_reg[10]_in \rx_hold_reg_reg[10]  2
.latch \rx_hold_reg_reg[0]_in \rx_hold_reg_reg[0]  2
.latch \rx_hold_reg_reg[11]_in \rx_hold_reg_reg[11]  2
.latch \rx_hold_reg_reg[12]_in \rx_hold_reg_reg[12]  2
.latch \rx_hold_reg_reg[14]_in \rx_hold_reg_reg[14]  2
.latch \rx_hold_reg_reg[15]_in \rx_hold_reg_reg[15]  2
.latch \rx_hold_reg_reg[1]_in \rx_hold_reg_reg[1]  2
.latch \rx_hold_reg_reg[4]_in \rx_hold_reg_reg[4]  2
.latch \rx_hold_reg_reg[5]_in \rx_hold_reg_reg[5]  2
.latch \rx_hold_reg_reg[6]_in \rx_hold_reg_reg[6]  2
.latch \rx_hold_reg_reg[9]_in \rx_hold_reg_reg[9]  2
.latch \rx_hold_reg_reg[2]_in \rx_hold_reg_reg[2]  2
.latch \rx_hold_reg_reg[7]_in \rx_hold_reg_reg[7]  2
.latch \rx_hold_reg_reg[13]_in \rx_hold_reg_reg[13]  2
.latch \rx_hold_reg_reg[3]_in \rx_hold_reg_reg[3]  2
.latch tx_go_r1_reg_in tx_go_r1_reg  2
.latch \psa_reg[2]_in \psa_reg[2]  2
.latch \psa_reg[5]_in \psa_reg[5]  2
.latch \psa_reg[1]_in \psa_reg[1]  2
.latch \psa_reg[7]_in \psa_reg[7]  2
.latch \psa_reg[6]_in \psa_reg[6]  2
.latch \psa_reg[0]_in \psa_reg[0]  2
.latch \psa_reg[3]_in \psa_reg[3]  2
.latch \psa_reg[4]_in \psa_reg[4]  2
.latch psync_reg_in  psync_reg  2
.latch pcm_sync_r1_reg_in pcm_sync_r1_reg  2
.latch rxd_t_reg_in  rxd_t_reg  2
.latch pcm_sync_r3_reg_in pcm_sync_r3_reg  2
.latch pcm_sync_r2_reg_in pcm_sync_r2_reg  2
.latch pclk_r_reg_in pclk_r_reg  2
.latch \tx_hold_byte_l_reg[5]_in \tx_hold_byte_l_reg[5]  2
.latch \tx_hold_byte_h_reg[7]_in \tx_hold_byte_h_reg[7]  2
.latch \tx_hold_byte_h_reg[4]_in \tx_hold_byte_h_reg[4]  2
.latch \tx_hold_byte_h_reg[6]_in \tx_hold_byte_h_reg[6]  2
.latch \tx_hold_byte_h_reg[1]_in \tx_hold_byte_h_reg[1]  2
.latch \tx_hold_byte_h_reg[2]_in \tx_hold_byte_h_reg[2]  2
.latch \tx_hold_byte_h_reg[3]_in \tx_hold_byte_h_reg[3]  2
.latch \tx_hold_byte_h_reg[5]_in \tx_hold_byte_h_reg[5]  2
.latch \tx_hold_byte_l_reg[1]_in \tx_hold_byte_l_reg[1]  2
.latch \tx_hold_byte_l_reg[2]_in \tx_hold_byte_l_reg[2]  2
.latch \tx_hold_byte_l_reg[4]_in \tx_hold_byte_l_reg[4]  2
.latch \tx_hold_byte_l_reg[7]_in \tx_hold_byte_l_reg[7]  2
.latch \tx_hold_byte_h_reg[0]_in \tx_hold_byte_h_reg[0]  2
.latch \tx_hold_byte_l_reg[6]_in \tx_hold_byte_l_reg[6]  2
.latch \tx_hold_byte_l_reg[3]_in \tx_hold_byte_l_reg[3]  2
.latch \tx_hold_byte_l_reg[0]_in \tx_hold_byte_l_reg[0]  2
.latch pclk_s_reg_in pclk_s_reg  2
.latch rxd_reg_in    rxd_reg  2
.latch pclk_t_reg_in pclk_t_reg  2

.names [115]
 0
.names [116]
 1
.names \tx_hold_reg_reg[15] pcm_dout_o
1 1
.names \tx_hold_reg_reg[1] [118]
0 1
.names \tx_hold_reg_reg[2] [119]
0 1
.names \tx_hold_reg_reg[3] [120]
0 1
.names \tx_hold_reg_reg[4] [121]
0 1
.names \tx_hold_reg_reg[5] [122]
0 1
.names \tx_hold_reg_reg[6] [123]
0 1
.names \tx_hold_reg_reg[7] [124]
0 1
.names \tx_hold_reg_reg[8] [125]
0 1
.names \tx_hold_reg_reg[9] [126]
0 1
.names \tx_hold_reg_reg[11] [127]
0 1
.names \tx_hold_reg_reg[12] [128]
0 1
.names \tx_hold_reg_reg[13] [129]
0 1
.names \tx_hold_reg_reg[14] [130]
0 1
.names \tx_hold_reg_reg[0] [131]
1 1
.names tx_go_reg [132]
1 1
.names \tx_hold_reg_reg[10] [133]
1 1
.names [221] [207] [480] \tx_hold_reg_reg[1]_in
11- 0
--1 0
.names [236] [190] [481] \tx_hold_reg_reg[14]_in
11- 0
--1 0
.names [237] [191] [481] \tx_hold_reg_reg[15]_in
11- 0
--1 0
.names [168] [169] \tx_hold_reg_reg[0]_in
11 0
.names [224] [210] [481] \tx_hold_reg_reg[4]_in
11- 0
--1 0
.names [225] [212] [480] \tx_hold_reg_reg[5]_in
11- 0
--1 0
.names [226] [213] [476] \tx_hold_reg_reg[6]_in
11- 0
--1 0
.names [227] [215] [478] \tx_hold_reg_reg[7]_in
11- 0
--1 0
.names \rx_reg_reg[13] [142]
0 1
.names \rx_reg_reg[14] [143]
0 1
.names \rx_reg_reg[15] [144]
0 1
.names \rx_reg_reg[1] [145]
0 1
.names \rx_reg_reg[2] [146]
0 1
.names \rx_reg_reg[3] [147]
0 1
.names \rx_reg_reg[4] [148]
0 1
.names \rx_reg_reg[5] [149]
0 1
.names \rx_reg_reg[6] [150]
0 1
.names \rx_reg_reg[7] [151]
0 1
.names \rx_reg_reg[8] [152]
0 1
.names \rx_reg_reg[9] [153]
0 1
.names \rx_reg_reg[0] [154]
0 1
.names \rx_reg_reg[12] [155]
0 1
.names \rx_reg_reg[10] [156]
0 1
.names [228] [216] [480] \tx_hold_reg_reg[8]_in
11- 0
--1 0
.names \rx_reg_reg[11] [158]
0 1
.names [229] [217] [574] \tx_hold_reg_reg[9]_in
11- 0
--1 0
.names [222] [208] [481] \tx_hold_reg_reg[2]_in
11- 0
--1 0
.names [223] [209] [480] \tx_hold_reg_reg[3]_in
11- 0
--1 0
.names [233] [218] [478] \tx_hold_reg_reg[11]_in
11- 0
--1 0
.names [234] [219] [476] \tx_hold_reg_reg[12]_in
11- 0
--1 0
.names [235] [189] [478] \tx_hold_reg_reg[13]_in
11- 0
--1 0
.names [414] [193] tx_go_reg_in
00 0
.names \tx_cnt_reg[3] [166]
1 1
.names [232] [238] [478] \tx_hold_reg_reg[10]_in
11- 0
--1 0
.names [230] [441] [168]
11 0
.names [131] rst [303] [576] [169]
1111 0
.names \tx_cnt_reg[2] [170]
1 1
.names \tx_cnt_reg[0] [171]
1 1
.names \tx_cnt_reg[1] [172]
1 1
.names [273] [257] [477] \rx_reg_reg[14]_in
11- 0
--1 0
.names [277] [261] [475] \rx_reg_reg[3]_in
11- 0
--1 0
.names [272] [256] [475] \rx_reg_reg[13]_in
11- 0
--1 0
.names [274] [258] [574] \rx_reg_reg[15]_in
11- 0
--1 0
.names [275] [259] [574] \rx_reg_reg[1]_in
11- 0
--1 0
.names [276] [260] [474] \rx_reg_reg[2]_in
11- 0
--1 0
.names [279] [263] [474] \rx_reg_reg[5]_in
11- 0
--1 0
.names [280] [264] [477] \rx_reg_reg[6]_in
11- 0
--1 0
.names [281] [265] [474] \rx_reg_reg[7]_in
11- 0
--1 0
.names [282] [266] [474] \rx_reg_reg[8]_in
11- 0
--1 0
.names [283] [267] [476] \rx_reg_reg[9]_in
11- 0
--1 0
.names [284] [268] [476] \rx_reg_reg[0]_in
11- 0
--1 0
.names [278] [262] [477] \rx_reg_reg[4]_in
11- 0
--1 0
.names [285] [269] [475] \rx_reg_reg[10]_in
11- 0
--1 0
.names [286] [270] [475] \rx_reg_reg[11]_in
11- 0
--1 0
.names [271] [255] [477] \rx_reg_reg[12]_in
11- 0
--1 0
.names [298] [303] [189]
11 0
.names [300] [303] [190]
11 0
.names [293] [303] [191]
11 0
.names \rx_hold_reg_reg[8] [192]
0 1
.names [327] [303] [544] [193]
11- 0
--1 0
.names \rx_hold_reg_reg[10] [194]
0 1
.names \rx_hold_reg_reg[0] [195]
0 1
.names \rx_hold_reg_reg[11] [196]
0 1
.names \rx_hold_reg_reg[12] [197]
0 1
.names \rx_hold_reg_reg[14] [198]
0 1
.names \rx_hold_reg_reg[15] [199]
0 1
.names \rx_hold_reg_reg[1] [200]
0 1
.names \rx_hold_reg_reg[4] [201]
0 1
.names \rx_hold_reg_reg[5] [202]
0 1
.names \rx_hold_reg_reg[6] [203]
0 1
.names \rx_hold_reg_reg[9] [204]
0 1
.names \rx_hold_reg_reg[2] [205]
0 1
.names \rx_hold_reg_reg[7] [206]
0 1
.names [287] [303] [207]
11 0
.names [299] [303] [208]
11 0
.names [289] [303] [209]
11 0
.names [301] [303] [210]
11 0
.names \rx_hold_reg_reg[13] [211]
0 1
.names [290] [303] [212]
11 0
.names [294] [303] [213]
11 0
.names \rx_hold_reg_reg[3] [214]
0 1
.names [291] [303] [215]
11 0
.names [297] [303] [216]
11 0
.names [288] [303] [217]
11 0
.names [295] [303] [218]
11 0
.names [296] [303] [219]
11 0
.names [324] [365] [544] \tx_cnt_reg[1]_in
11- 0
--1 0
.names [499] [303] [221]
00 0
.names [527] [303] [222]
00 0
.names [500] [303] [223]
00 0
.names [510] [303] [224]
00 0
.names [511] [303] [225]
00 0
.names [534] [303] [226]
00 0
.names [529] [303] [227]
00 0
.names [501] [303] [228]
00 0
.names [303] [518] [229]
00 0
.names [574] [303] [230]
00 1
.names [325] [340] [544] \tx_cnt_reg[2]_in
11- 0
--1 0
.names [528] [303] [232]
00 0
.names [509] [303] [233]
00 0
.names [557] [303] [234]
00 0
.names [539] [303] [235]
00 0
.names [553] [303] [236]
00 0
.names [562] [303] [237]
00 0
.names [313] [388] [303] [238]
00- 1
--0 1
.names [323] [376] [544] \tx_cnt_reg[0]_in
11- 0
--1 0
.names [373] [342] [478] \rx_hold_reg_reg[10]_in
11- 0
--1 0
.names [374] [343] [479] \rx_hold_reg_reg[11]_in
11- 0
--1 0
.names [375] [344] [479] \rx_hold_reg_reg[12]_in
11- 0
--1 0
.names [377] [345] [479] \rx_hold_reg_reg[13]_in
11- 0
--1 0
.names [378] [346] [479] \rx_hold_reg_reg[14]_in
11- 0
--1 0
.names [379] [347] [476] \rx_hold_reg_reg[15]_in
11- 0
--1 0
.names [380] [348] [478] \rx_hold_reg_reg[1]_in
11- 0
--1 0
.names [381] [349] [479] \rx_hold_reg_reg[2]_in
11- 0
--1 0
.names [382] [350] [479] \rx_hold_reg_reg[3]_in
11- 0
--1 0
.names [383] [351] [479] \rx_hold_reg_reg[4]_in
11- 0
--1 0
.names [384] [352] [476] \rx_hold_reg_reg[5]_in
11- 0
--1 0
.names [385] [353] [476] \rx_hold_reg_reg[6]_in
11- 0
--1 0
.names [386] [354] [476] \rx_hold_reg_reg[7]_in
11- 0
--1 0
.names [389] [356] [479] \rx_hold_reg_reg[9]_in
11- 0
--1 0
.names [387] [355] [478] \rx_hold_reg_reg[8]_in
11- 0
--1 0
.names [331] [564] [255]
11 0
.names [331] [550] [256]
11 0
.names [331] [555] [257]
11 0
.names [331] [558] [258]
11 0
.names [331] [552] [259]
11 0
.names [331] [551] [260]
11 0
.names [331] [522] [261]
11 0
.names [331] [521] [262]
11 0
.names [331] [535] [263]
11 0
.names [331] [547] [264]
11 0
.names [331] [563] [265]
11 0
.names [331] [559] [266]
11 0
.names [331] [546] [267]
11 0
.names [331] [560] [268]
11 0
.names [331] [543] [269]
11 0
.names [331] [536] [270]
11 0
.names [332] [155] [271]
00 0
.names [332] [142] [272]
00 0
.names [332] [143] [273]
00 0
.names [332] [144] [274]
00 0
.names [332] [145] [275]
00 0
.names [332] [146] [276]
00 0
.names [332] [147] [277]
00 0
.names [332] [148] [278]
00 0
.names [332] [149] [279]
00 0
.names [332] [150] [280]
00 0
.names [332] [151] [281]
00 0
.names [332] [152] [282]
00 0
.names [332] [153] [283]
00 0
.names [332] [154] [284]
00 0
.names [332] [156] [285]
00 0
.names [332] [158] [286]
00 0
.names [314] [359] [287]
11 0
.names [322] [364] [288]
11 0
.names [318] [361] [289]
11 0
.names [315] [362] [290]
11 0
.names [319] [358] [291]
11 0
.names tx_go_r1_reg [292]
1 1
.names [329] [357] [293]
11 0
.names [320] [371] [294]
11 0
.names [328] [367] [295]
11 0
.names [330] [368] [296]
11 0
.names [333] [369] [297]
11 0
.names [326] [366] [298]
11 0
.names [316] [360] [299]
11 0
.names [321] [370] [300]
11 0
.names [317] [363] [301]
11 0
.names [390] [372] [478] \rx_hold_reg_reg[0]_in
11- 0
--1 0
.names [312] [303]
0 1
.names \psa_reg[2] [304]
1 1
.names \psa_reg[5] [305]
1 1
.names \psa_reg[1] [306]
1 1
.names \psa_reg[7] [307]
1 1
.names \psa_reg[6] [308]
1 1
.names \psa_reg[0] [309]
1 1
.names \psa_reg[3] [310]
1 1
.names \psa_reg[4] [311]
1 1
.names psync_reg [312]
1 1
.names [578] [126] [313]
00 1
.names [548] [399] [314]
11 0
.names [519] [399] [315]
11 0
.names [541] [399] [316]
11 0
.names [513] [398] [317]
11 0
.names [549] [398] [318]
11 0
.names [505] [398] [319]
11 0
.names [503] [399] [320]
11 0
.names [506] [398] [321]
11 0
.names [399] [565] [322]
11 0
.names [171] [397] [323]
11 0
.names [172] [397] [324]
11 0
.names [170] [397] [325]
11 0
.names [545] [398] [326]
11 0
.names [397] [132] [327]
11 0
.names [523] [398] [328]
11 0
.names [399] pcm_dout_o [329]
11 0
.names [515] [398] [330]
11 0
.names [391] [331]
0 1
.names [392] [332]
0 1
.names [507] [399] [333]
11 0
.names [403] [576] tx_go_r1_reg_in
11 0
.names [306] [309] [567] \psa_reg[1]_in
01- 1
1-1 1
.names [304] [306] [567] \psa_reg[2]_in
01- 1
1-1 1
.names [310] [304] [567] \psa_reg[3]_in
01- 1
1-1 1
.names [305] [311] [567] \psa_reg[5]_in
01- 1
1-1 1
.names pcm_sync_r1_reg [339]
0 1
.names [419] [570] [340]
11 0
.names rxd_t_reg [341]
0 1
.names [404] [546] [342]
11 0
.names [404] [543] [343]
11 0
.names [404] [536] [344]
11 0
.names [404] [564] [345]
11 0
.names [404] [550] [346]
11 0
.names [404] [555] [347]
11 0
.names [404] [560] [348]
11 0
.names [404] [552] [349]
11 0
.names [404] [551] [350]
11 0
.names [404] [522] [351]
11 0
.names [404] [521] [352]
11 0
.names [404] [535] [353]
11 0
.names [404] [547] [354]
11 0
.names [404] [563] [355]
11 0
.names [404] [559] [356]
11 0
.names [506] [571] [357]
11 0
.names [503] [571] [358]
11 0
.names [131] [571] [359]
11 0
.names [548] [571] [360]
11 0
.names [541] [570] [361]
11 0
.names [513] [571] [362]
11 0
.names [549] [570] [363]
11 0
.names [507] [570] [364]
11 0
.names [440] [570] [365]
11 0
.names [515] [571] [366]
11 0
.names [133] [571] [367]
11 0
.names [523] [570] [368]
11 0
.names [505] [571] [369]
11 0
.names [545] [570] [370]
11 0
.names [519] [570] [371]
11 0
.names [404] [472] [372]
11 0
.names [405] [194] [373]
00 0
.names [405] [196] [374]
00 0
.names [405] [197] [375]
00 0
.names [542] [570] [376]
11 0
.names [405] [211] [377]
00 0
.names [405] [198] [378]
00 0
.names [405] [199] [379]
00 0
.names [405] [200] [380]
00 0
.names [405] [205] [381]
00 0
.names [405] [214] [382]
00 0
.names [405] [201] [383]
00 0
.names [405] [202] [384]
00 0
.names [405] [203] [385]
00 0
.names [405] [206] [386]
00 0
.names [405] [192] [387]
00 0
.names [530] [570] [388]
00 1
.names [405] [204] [389]
00 0
.names [405] [195] [390]
00 0
.names [400] [391]
0 1
.names [400] [392]
0 1
.names [307] [308] [567] \psa_reg[7]_in
01- 1
1-1 1
.names [308] [305] [567] \psa_reg[6]_in
01- 1
1-1 1
.names [309] [524] [567] \psa_reg[0]_in
01- 1
1-1 1
.names [311] [310] [567] \psa_reg[4]_in
01- 1
1-1 1
.names [577] [397]
0 1
.names [402] [398]
0 1
.names [402] [399]
0 1
.names [582] [400]
0 1
.names [412] [409] psync_reg_in
00 1
.names [580] [402]
0 1
.names [292] [566] [403]
11 0
.names [408] [404]
1 1
.names [408] [405]
1 1
.names pcm_sync_i [524] [410] pcm_sync_r1_reg_in
01- 1
1-1 1
.names pcm_din_i rxd_reg_in [410] rxd_t_reg_in
01- 1
1-1 1
.names [512] [586] [410] [408]
11- 0
--1 0
.names pcm_sync_r3_reg [409]
1 1
.names [439] [413] [410]
11 0
.names [412] pcm_sync_r3_reg_in
0 1
.names pcm_sync_r2_reg [412]
0 1
.names [585] [413]
0 1
.names [418] [166] [456] [414]
11- 0
--1 0
.names [420] [422] ssel[2] pcm_sync_r2_reg_in
01- 1
1-1 1
.names pclk_r_reg [416]
1 1
.names [166] [438] [417]
01 1
10 1
.names [438] [418]
0 1
.names [170] [473] [419]
01 1
10 1
.names [469] [470] ssel[1] [420]
01- 1
1-1 1
.names \tx_hold_byte_l_reg[5] [421]
1 1
.names [467] [468] ssel[1] [422]
01- 1
1-1 1
.names [439] pclk_r_reg_in
0 1
.names \tx_hold_byte_h_reg[7] [424]
1 1
.names \tx_hold_byte_h_reg[4] [425]
1 1
.names \tx_hold_byte_h_reg[6] [426]
1 1
.names \tx_hold_byte_h_reg[1] [427]
1 1
.names \tx_hold_byte_h_reg[2] [428]
1 1
.names \tx_hold_byte_h_reg[3] [429]
1 1
.names \tx_hold_byte_h_reg[5] [430]
1 1
.names \tx_hold_byte_l_reg[1] [431]
1 1
.names \tx_hold_byte_l_reg[2] [432]
1 1
.names \tx_hold_byte_l_reg[4] [433]
1 1
.names \tx_hold_byte_l_reg[7] [434]
1 1
.names \tx_hold_byte_h_reg[0] [435]
1 1
.names \tx_hold_byte_l_reg[6] [436]
1 1
.names \tx_hold_byte_l_reg[3] [437]
1 1
.names [473] [170] [438]
11 0
.names [443] [439]
0 1
.names [172] [171] [440]
01 1
10 1
.names \tx_hold_byte_l_reg[0] [441]
1 1
.names [532] [517] re_i dout_o[4]
01- 1
1-1 1
.names pclk_s_reg [443]
1 1
.names we_i[0] [529] [484] \tx_hold_byte_l_reg[7]_in
00- 1
--0 1
.names we_i[0] [500] [482] \tx_hold_byte_l_reg[3]_in
00- 1
--0 1
.names we_i[1] [528] [487] \tx_hold_byte_h_reg[2]_in
00- 1
--0 1
.names we_i[1] [518] [488] \tx_hold_byte_h_reg[1]_in
00- 1
--0 1
.names we_i[0] [499] [492] \tx_hold_byte_l_reg[1]_in
00- 1
--0 1
.names we_i[1] [501] [494] \tx_hold_byte_h_reg[0]_in
00- 1
--0 1
.names we_i[1] [509] [489] \tx_hold_byte_h_reg[3]_in
00- 1
--0 1
.names we_i[1] [553] [495] \tx_hold_byte_h_reg[6]_in
00- 1
--0 1
.names we_i[0] [510] [497] \tx_hold_byte_l_reg[4]_in
00- 1
--0 1
.names we_i[0] [534] [491] \tx_hold_byte_l_reg[6]_in
00- 1
--0 1
.names we_i[0] [511] [490] \tx_hold_byte_l_reg[5]_in
00- 1
--0 1
.names we_i[1] [539] [483] \tx_hold_byte_h_reg[5]_in
00- 1
--0 1
.names rst [132] [456]
11 0
.names we_i[0] [527] [493] \tx_hold_byte_l_reg[2]_in
00- 1
--0 1
.names [540] [537] re_i dout_o[0]
01- 1
1-1 1
.names [533] [514] re_i dout_o[7]
01- 1
1-1 1
.names [525] [516] re_i dout_o[6]
01- 1
1-1 1
.names [520] [504] re_i dout_o[5]
01- 1
1-1 1
.names [538] [554] re_i dout_o[3]
01- 1
1-1 1
.names [526] [502] re_i dout_o[2]
01- 1
1-1 1
.names [531] [508] re_i dout_o[1]
01- 1
1-1 1
.names we_i[1] [562] [485] \tx_hold_byte_h_reg[7]_in
00- 1
--0 1
.names we_i[1] [557] [486] \tx_hold_byte_h_reg[4]_in
00- 1
--0 1
.names [311] [305] ssel[0] [467]
01- 1
1-1 1
.names [308] [307] ssel[0] [468]
01- 1
1-1 1
.names [309] [306] ssel[0] [469]
01- 1
1-1 1
.names [304] [310] ssel[0] [470]
01- 1
1-1 1
.names [441] din_i[0] we_i[0] \tx_hold_byte_l_reg[0]_in
01- 1
1-1 1
.names rxd_reg [472]
1 1
.names [542] [561] [473]
00 1
.names rst [474]
0 1
.names rst [475]
0 1
.names rst [476]
0 1
.names rst [477]
0 1
.names rst [478]
0 1
.names rst [479]
0 1
.names rst [480]
0 1
.names rst [481]
0 1
.names din_i[3] we_i[0] [482]
11 0
.names we_i[1] din_i[5] [483]
11 0
.names din_i[7] we_i[0] [484]
11 0
.names we_i[1] din_i[7] [485]
11 0
.names we_i[1] din_i[4] [486]
11 0
.names we_i[1] din_i[2] [487]
11 0
.names we_i[1] din_i[1] [488]
11 0
.names we_i[1] din_i[3] [489]
11 0
.names din_i[5] we_i[0] [490]
11 0
.names din_i[6] we_i[0] [491]
11 0
.names din_i[1] we_i[0] [492]
11 0
.names din_i[2] we_i[0] [493]
11 0
.names we_i[1] din_i[0] [494]
11 0
.names we_i[1] din_i[6] [495]
11 0
.names [586] [496]
0 1
.names din_i[4] we_i[0] [497]
11 0
.names pclk_t_reg pclk_s_reg_in
1 1
.names [431] [499]
0 1
.names [437] [500]
0 1
.names [435] [501]
0 1
.names [156] [502]
0 1
.names [123] [503]
0 1
.names [142] [504]
0 1
.names [124] [505]
0 1
.names [130] [506]
0 1
.names [125] [507]
0 1
.names [153] [508]
0 1
.names [429] [509]
0 1
.names [433] [510]
0 1
.names [421] [511]
0 1
.names [292] [512]
0 1
.names [121] [513]
0 1
.names [144] [514]
0 1
.names [128] [515]
0 1
.names [143] [516]
0 1
.names [155] [517]
0 1
.names [427] [518]
0 1
.names [122] [519]
0 1
.names [149] [520]
0 1
.names [201] [521]
0 1
.names [214] [522]
0 1
.names [127] [523]
0 1
.names [339] [524]
0 1
.names [150] [525]
0 1
.names [146] [526]
0 1
.names [432] [527]
0 1
.names [428] [528]
0 1
.names [434] [529]
0 1
.names [133] [530]
0 1
.names [145] [531]
0 1
.names [148] [532]
0 1
.names [151] [533]
0 1
.names [436] [534]
0 1
.names [202] [535]
0 1
.names [196] [536]
0 1
.names [152] [537]
0 1
.names [147] [538]
0 1
.names [430] [539]
0 1
.names [154] [540]
0 1
.names [119] [541]
0 1
.names [171] [542]
0 1
.names [194] [543]
0 1
.names rst [544]
0 1
.names [129] [545]
0 1
.names [204] [546]
0 1
.names [203] [547]
0 1
.names [118] [548]
0 1
.names [120] [549]
0 1
.names [211] [550]
0 1
.names [205] [551]
0 1
.names [200] [552]
0 1
.names [426] [553]
0 1
.names [158] [554]
0 1
.names [198] [555]
0 1
.names [341] rxd_reg_in
0 1
.names [425] [557]
0 1
.names [199] [558]
0 1
.names [192] [559]
0 1
.names [195] [560]
0 1
.names [172] [561]
0 1
.names [424] [562]
0 1
.names [206] [563]
0 1
.names [197] [564]
0 1
.names [126] [565]
0 1
.names [567] [566]
0 1
.names [568] [567]
1 1
.names [569] [568]
0 1
.names [585] [443] [569]
11 0
.names [572] [570]
0 1
.names [572] [571]
0 1
.names [581] [572]
0 1
.names [574] [575] \tx_cnt_reg[3]_in
00 1
.names rst [574]
0 1
.names [166] [576] [579] [575]
11- 0
--1 0
.names [577] [576]
0 1
.names [578] [577]
0 1
.names [496] [568] [578]
11 0
.names [417] [576] [579]
00 1
.names [568] [496] [580]
11 0
.names [586] [584] [581]
00 1
.names [583] [586] [292] [582]
111 0
.names [584] [583]
0 1
.names [585] [443] [584]
11 0
.names [416] [585]
0 1
.names [132] [586]
0 1
.names pcm_clk_i pclk_t_reg_in
1 1
.end