24 lines
298 B
Coq
24 lines
298 B
Coq
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// Test enable circuitry
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module simple(clock,
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enable,
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value_out
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);
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input clock;
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input enable;
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reg temp;
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output value_out;
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always @(posedge clock)
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begin
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if (enable == 1'b1) begin
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temp <= 1'b0;
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end
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end
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assign value_out = temp;
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endmodule
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