20 lines
293 B
Coq
20 lines
293 B
Coq
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module ACC(
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output [7:0] acc_out1,
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output [7:0] acc_out2,
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input [7:0] acc_in,
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input la_,
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input clk,
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input clr_
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);
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reg [7:0] q;
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always @(posedge clk)
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if (~clr_) q <= 8'b0;
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else if(~la_) q <= acc_in;
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assign acc_out1 = q;
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assign acc_out2 = q;
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endmodule
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