20 lines
477 B
Coq
20 lines
477 B
Coq
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//------ Module: sram6T_blwl -----//
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//------ Verilog file: sram.v -----//
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//------ Author: Xifan TANG -----//
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module adder(
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input [0:0] a, // Input a
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input [0:0] b, // Input b
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input [0:0] cin, // Input cin
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output [0:0] cout, // Output carry
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output [0:0] sumout // Output sum
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);
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wire[1:0] int_calc;
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assign int_calc = a + b + cin;
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assign cout = int_calc[1];
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assign sumout = int_calc[0];
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// assign sumout = a ^ b ^ cin;
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// assign cout = a & b + a & cin + b & cin;
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endmodule
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