OpenFPGA/vpr7_x2p/vpr/Circuits/test_modes.blif

# Benchmark "test" written by ABC on Tue Apr 30 17:17:10 2019
.model test_modes
.inputs clk a_0 a_1 a_2 a_3 b_0 b_1 b_2 b_3 cin e f g
.outputs sum_0 sum_1 sum_2 sum_3 cout x y z

.latch        n57    reg_a_0 re        clk  0
.latch        n62    reg_a_1 re        clk  0
.latch        n67    reg_a_2 re        clk  0
.latch        n72    reg_a_3 re        clk  0
.latch        n77    reg_b_0 re        clk  0
.latch        n82    reg_b_1 re        clk  0
.latch        n87    reg_b_2 re        clk  0
.latch        n92    reg_b_3 re        clk  0
.latch        n97    reg_cin re        clk  0
.latch       n102      sum_0 re        clk  0
.latch       n106      sum_1 re        clk  0
.latch       n110      sum_2 re        clk  0
.latch       n114      sum_3 re        clk  0
.latch       n118       cout re        clk  0


.subckt adder a=reg_a_0 b=reg_b_0 cin=reg_cin cout=cint01 sumout=n01
.subckt adder a=reg_a_1 b=reg_b_1 cin=cint01 cout=cint02 sumout=n02
.subckt adder a=reg_a_2 b=reg_b_2 cin=cint02 cout=cint03 sumout=n03
.subckt adder a=reg_a_3 b=reg_b_3 cin=cint03 cout=cint04 sumout=n04
.subckt adder a=ref0 b=ref0 cin=cint04 cout=unconn sumout=n05
.subckt shift D=d0 clk=clk Q=reg0
.subckt shift D=reg0 clk=clk Q=reg1
.subckt shift D=reg1 clk=clk Q=reg2
.subckt shift D=reg2 clk=clk Q=reg3
.subckt shift D=reg3 clk=clk Q=reg4
.subckt shift D=reg4 clk=clk Q=reg5
.subckt shift D=reg5 clk=clk Q=reg6
.subckt shift D=reg6 clk=clk Q=reg7
.subckt shift D=reg7 clk=clk Q=reg8
.subckt shift D=reg8 clk=clk Q=reg9
.subckt shift D=reg9 clk=clk Q=reg10
.subckt shift D=reg10 clk=clk Q=reg11

.names ref0
 0
.names a_0 n57
1 1
.names a_1 n62
1 1
.names a_2 n67
1 1
.names a_3 n72
1 1
.names b_0 n77
1 1
.names b_1 n82
1 1
.names b_2 n87
1 1
.names b_3 n92
1 1
.names cin n97
1 1
.names e f g d0
1-1 1
-0- 1
.names reg3 x
1 1
.names reg7 y
1 1
.names reg11 z
1 1
.names n01 n102
1 1
.names n02 n106
1 1
.names n03 n110
1 1
.names n04 n114
1 1
.names n05 n118
1 1
.end


.model adder
.inputs a b cin
.outputs cout sumout
.blackbox
.end


.model shift
.inputs D clk
.outputs Q
.blackbox
.end