OpenFPGA/openfpga_flow/benchmarks/micro_benchmark/and2_pipelined/and2_pipelined.act

mirror of https://github.com/lnis-uofu/OpenFPGA.git
a 0.5 0.2
b 0.5 0.2
c 0.25 0.1
a_reg 0.5 0.2
b_reg 0.5 0.2
c_reg 0.25 0.1
clk 0.500000 2.000000
[Benchmark] Add a micro benchmark to test pipelined architecture 2021-01-10 11:21:30 -06:00			`a 0.5 0.2`
			`b 0.5 0.2`
			`c 0.25 0.1`
			`a_reg 0.5 0.2`
			`b_reg 0.5 0.2`
			`c_reg 0.25 0.1`
			`clk 0.500000 2.000000`