This website requires JavaScript.
Explore
Help
Sign In
riscv
/
OpenFPGA
mirror of
https://github.com/lnis-uofu/OpenFPGA.git
Watch
1
Star
0
Fork
You've already forked OpenFPGA
0
Code
Issues
Projects
Releases
Wiki
Activity
42cede37fa
OpenFPGA
/
yosys
/
tests
/
aiger
/
buffer.aag
6 lines
32 B
Plaintext
Raw
Normal View
History
Unescape
Escape
Update yosys to latest version + add simulation in fpga_flow
2019-05-23 18:55:49 -05:00
aag 1 1 0 1 0
2
2
Upgrade to yosys-0.9
2019-11-27 15:40:39 -06:00
i0 pi0
o0 po0