OpenFPGA/fpga_flow/benchmarks/FPGA_SPICE_bench/s1488.blif

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2018-07-26 12:28:21 -05:00
.model TOP
.inputs s1488_in_7_ s1488_in_6_ s1488_in_5_ s1488_in_4_ s1488_in_3_ \
s1488_in_2_ s1488_in_1_ s1488_in_0_ clock
.outputs s1488_out_18_ s1488_out_17_ s1488_out_16_ s1488_out_15_ s1488_out_14_ \
s1488_out_13_ s1488_out_12_ s1488_out_11_ s1488_out_10_ s1488_out_9_ \
s1488_out_8_ s1488_out_7_ s1488_out_6_ s1488_out_5_ s1488_out_4_ s1488_out_3_ \
s1488_out_2_ s1488_out_1_ s1488_out_0_
.latch N_N33 N_N356 re clock 2
.latch N_N34 N_N357 re clock 2
.latch N_N35 N_N358 re clock 2
.latch N_N36 N_N359 re clock 2
.latch N_N37 N_N360 re clock 2
.latch N_N38 N_N361 re clock 2
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.end