14 lines
480 B
SourcePawn
14 lines
480 B
SourcePawn
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*****************************
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* FPGA SPICE Netlist *
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* Description: Header file *
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* Author: Xifan TANG *
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* Organization: EPFL/IC/LSI *
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* Date: Thu Nov 15 14:26:08 2018
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*
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*****************************
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.include './spice_test_example_2/subckt/grid_1_2.sp'
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.include './spice_test_example_2/subckt/grid_1_0.sp'
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.include './spice_test_example_2/subckt/grid_2_1.sp'
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.include './spice_test_example_2/subckt/grid_0_1.sp'
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.include './spice_test_example_2/subckt/grid_1_1.sp'
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