OpenFPGA/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_mux.h

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/***********************************************
* Header file for verilog_submodule_mux.cpp
**********************************************/
2019-08-20 22:01:38 -05:00
#ifndef VERILOG_MUX_H
#define VERILOG_MUX_H
/* Include other header files which are dependency on the function declared below */
#include <fstream>
#include "circuit_library.h"
#include "mux_graph.h"
#include "mux_library.h"
void generate_verilog_mux_branch_module(std::fstream& fp,
const CircuitLibrary& circuit_lib,
const CircuitModelId& circuit_model,
const size_t& mux_size,
const MuxGraph& mux_graph);
#endif