359 lines
10 KiB
Coq
359 lines
10 KiB
Coq
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// AES top file ////
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//// ////
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//// This file is part of the SystemC AES ////
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//// ////
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//// Description: ////
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//// AES top ////
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//// ////
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//// Generated automatically using SystemC to Verilog translator ////
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//// ////
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//// To Do: ////
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//// - done ////
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//// ////
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//// Author(s): ////
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//// - Javier Castillo, jcastilo@opencores.org ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2000 Authors and OPENCORES.ORG ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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//
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// $Log: aes.v,v $
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// Revision 1.1.1.1 2004/07/05 09:46:23 jcastillo
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// First import
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//
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module aes(clk,reset,load_i,decrypt_i,data_i,key_i,ready_o,data_o);
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input clk;
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input reset;
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input load_i;
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input decrypt_i;
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input [127:0] data_i;
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input [127:0] key_i;
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output ready_o;
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output [127:0] data_o;
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reg ready_o;
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reg [127:0] data_o;
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reg next_ready_o;
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reg keysched_start_i;
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reg [3:0] keysched_round_i;
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reg [127:0] keysched_last_key_i;
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wire [127:0] keysched_new_key_o;
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wire keysched_ready_o;
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wire keysched_sbox_access_o;
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wire [7:0] keysched_sbox_data_o;
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wire keysched_sbox_decrypt_o;
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reg mixcol_start_i;
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reg [127:0] mixcol_data_i;
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wire mixcol_ready_o;
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wire [127:0] mixcol_data_o;
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reg subbytes_start_i;
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reg [127:0] subbytes_data_i;
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wire subbytes_ready_o;
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wire [127:0] subbytes_data_o;
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wire [7:0] subbytes_sbox_data_o;
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wire subbytes_sbox_decrypt_o;
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wire [7:0] sbox_data_o;
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reg [7:0] sbox_data_i;
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reg sbox_decrypt_i;
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reg state;
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reg next_state;
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reg [3:0] round;
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reg [3:0] next_round;
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reg [127:0] addroundkey_data_o;
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reg [127:0] next_addroundkey_data_reg;
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reg [127:0] addroundkey_data_reg;
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reg [127:0] addroundkey_data_i;
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reg addroundkey_ready_o;
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reg next_addroundkey_ready_o;
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reg addroundkey_start_i;
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reg next_addroundkey_start_i;
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reg [3:0] addroundkey_round;
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reg [3:0] next_addroundkey_round;
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reg first_round_reg;
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reg next_first_round_reg;
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sbox sbox1 (.clk(clk), .reset(reset), .data_i(sbox_data_i), .decrypt_i(sbox_decrypt_i), .data_o(sbox_data_o));
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subbytes sub1 (.clk(clk), .reset(reset), .start_i(subbytes_start_i), .decrypt_i(decrypt_i), .data_i(subbytes_data_i), .ready_o(subbytes_ready_o), .data_o(subbytes_data_o), .sbox_data_o(subbytes_sbox_data_o), .sbox_data_i(sbox_data_o), .sbox_decrypt_o(subbytes_sbox_decrypt_o));
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mixcolum mix1 (.clk(clk), .reset(reset), .decrypt_i(decrypt_i), .start_i(mixcol_start_i), .data_i(mixcol_data_i), .ready_o(mixcol_ready_o), .data_o(mixcol_data_o));
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keysched ks1 (.clk(clk), .reset(reset), .start_i(keysched_start_i), .round_i(keysched_round_i), .last_key_i(keysched_last_key_i), .new_key_o(keysched_new_key_o), .ready_o(keysched_ready_o), .sbox_access_o(keysched_sbox_access_o), .sbox_data_o(keysched_sbox_data_o), .sbox_data_i(sbox_data_o), .sbox_decrypt_o(keysched_sbox_decrypt_o));
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//registers:
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always @(posedge clk or negedge reset)
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begin
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if(!reset)
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begin
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state = (0);
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ready_o = (0);
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round = (0);
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addroundkey_round = (0);
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addroundkey_data_reg = (0);
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addroundkey_ready_o = (0);
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addroundkey_start_i = (0);
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first_round_reg = (0);
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end
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else
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begin
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state = (next_state);
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ready_o = (next_ready_o);
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round = (next_round);
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addroundkey_round = (next_addroundkey_round);
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addroundkey_data_reg = (next_addroundkey_data_reg);
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addroundkey_ready_o = (next_addroundkey_ready_o);
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first_round_reg = (next_first_round_reg);
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addroundkey_start_i = (next_addroundkey_start_i);
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end
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end
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//control:
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always @( state or round or addroundkey_data_o or data_i or load_i or decrypt_i or addroundkey_ready_o or mixcol_ready_o or subbytes_ready_o or subbytes_data_o or mixcol_data_o or first_round_reg)
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begin
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next_state = (state);
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next_round = (round);
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data_o = (addroundkey_data_o);
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next_ready_o = (0);
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//Tokeyschedulemodule
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next_first_round_reg = (0);
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subbytes_data_i = (0);
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mixcol_data_i = (0);
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addroundkey_data_i = (0);
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next_addroundkey_start_i = (first_round_reg);
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mixcol_start_i = ((addroundkey_ready_o&decrypt_i&round!=10)|(subbytes_ready_o&!decrypt_i));
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subbytes_start_i = ((addroundkey_ready_o&!decrypt_i)|(mixcol_ready_o&decrypt_i)|(addroundkey_ready_o&decrypt_i&round==10));
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if(decrypt_i&&round!=10)
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begin
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addroundkey_data_i = (subbytes_data_o);
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subbytes_data_i = (mixcol_data_o);
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mixcol_data_i = (addroundkey_data_o);
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end
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else if(!decrypt_i&&round!=0)
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begin
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addroundkey_data_i = (mixcol_data_o);
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subbytes_data_i = (addroundkey_data_o);
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mixcol_data_i = (subbytes_data_o);
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end
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else
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begin
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mixcol_data_i = (subbytes_data_o);
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subbytes_data_i = (addroundkey_data_o);
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addroundkey_data_i = (data_i);
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end
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case(state)
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0:
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begin
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if(load_i)
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begin
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next_state = (1);
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if(decrypt_i)
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next_round = (10);
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else
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next_round = (0);
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next_first_round_reg = (1);
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end
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end
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1:
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begin
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//Counter
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if(!decrypt_i&&mixcol_ready_o)
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begin
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next_addroundkey_start_i = (1);
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addroundkey_data_i = (mixcol_data_o);
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next_round = (round+1);
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end
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else if(decrypt_i&&subbytes_ready_o)
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begin
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next_addroundkey_start_i = (1);
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addroundkey_data_i = (subbytes_data_o);
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next_round = (round-1);
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end
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//Output
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if((round==9&&!decrypt_i)||(round==0&&decrypt_i))
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begin
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next_addroundkey_start_i = (0);
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mixcol_start_i = (0);
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if(subbytes_ready_o)
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begin
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addroundkey_data_i = (subbytes_data_o);
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next_addroundkey_start_i = (1);
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next_round = (round+1);
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end
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end
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if((round==10&&!decrypt_i)||(round==0&&decrypt_i))
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begin
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addroundkey_data_i = (subbytes_data_o);
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subbytes_start_i = (0);
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if(addroundkey_ready_o)
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begin
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next_ready_o = (1);
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next_state = (0);
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next_addroundkey_start_i = (0);
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next_round = (0);
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end
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end
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end
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default:
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begin
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next_state = (0);
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end
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endcase
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end
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//addroundkey:
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reg[127:0] data_var,round_data_var,round_key_var;
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always @( addroundkey_data_i or addroundkey_start_i or addroundkey_data_reg or addroundkey_round or keysched_new_key_o or keysched_ready_o or key_i or round)
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begin
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round_data_var=addroundkey_data_reg;
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next_addroundkey_data_reg = (addroundkey_data_reg);
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next_addroundkey_ready_o = (0);
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next_addroundkey_round = (addroundkey_round);
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addroundkey_data_o = (addroundkey_data_reg);
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if(addroundkey_round==1||addroundkey_round==0)
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keysched_last_key_i = (key_i);
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else
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keysched_last_key_i = (keysched_new_key_o);
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keysched_start_i = (0);
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keysched_round_i = (addroundkey_round);
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if(round==0&&addroundkey_start_i)
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begin
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//Taketheinputandxorthemwithdataifround==0;
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data_var=addroundkey_data_i;
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round_key_var=key_i;
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round_data_var=round_key_var^data_var;
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next_addroundkey_data_reg = (round_data_var);
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next_addroundkey_ready_o = (1);
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end
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else if(addroundkey_start_i&&round!=0)
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begin
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keysched_last_key_i = (key_i);
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keysched_start_i = (1);
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keysched_round_i = (1);
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next_addroundkey_round = (1);
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end
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else if(addroundkey_round!=round&&keysched_ready_o)
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begin
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next_addroundkey_round = (addroundkey_round+1);
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keysched_last_key_i = (keysched_new_key_o);
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keysched_start_i = (1);
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keysched_round_i = (addroundkey_round+1);
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end
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else if(addroundkey_round==round&&keysched_ready_o)
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begin
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data_var=addroundkey_data_i;
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round_key_var=keysched_new_key_o;
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round_data_var=round_key_var^data_var;
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next_addroundkey_data_reg = (round_data_var);
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next_addroundkey_ready_o = (1);
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next_addroundkey_round = (0);
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end
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end
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//sbox_muxes:
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always @( keysched_sbox_access_o or keysched_sbox_decrypt_o or keysched_sbox_data_o or subbytes_sbox_decrypt_o or subbytes_sbox_data_o)
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begin
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if(keysched_sbox_access_o)
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begin
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sbox_decrypt_i = (keysched_sbox_decrypt_o);
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sbox_data_i = (keysched_sbox_data_o);
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end
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else
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begin
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sbox_decrypt_i = (subbytes_sbox_decrypt_o);
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sbox_data_i = (subbytes_sbox_data_o);
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end
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end
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endmodule
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