10 lines
294 B
XML
10 lines
294 B
XML
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<pin_constraints>
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<!-- For a given .blif file, we want to assign
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- the clk0 signal to the clk[0] port of the FPGA fabric
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- the clk1 signal to the clk[1] port of the FPGA fabric
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-->
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<set_io pin="clk[0]" net="clk0"/>
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<set_io pin="clk[1]" net="clk1"/>
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</pin_constraints>
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