41 lines
2.3 KiB
C
41 lines
2.3 KiB
C
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#ifndef VERILOG_CONSTANTS_H
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#define VERILOG_CONSTANTS_H
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/* global parameters for dumping synthesizable verilog */
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constexpr char* VERILOG_NETLIST_FILE_POSTFIX = ".v";
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constexpr float VERILOG_SIM_TIMESCALE = 1e-9; // Verilog Simulation time scale (minimum time unit) : 1ns
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constexpr char* VERILOG_TIMING_PREPROC_FLAG = "ENABLE_TIMING"; // the flag to enable timing definition during compilation
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constexpr char* VERILOG_SIGNAL_INIT_PREPROC_FLAG = "ENABLE_SIGNAL_INITIALIZATION"; // the flag to enable signal initialization during compilation
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constexpr char* VERILOG_FORMAL_VERIFICATGION_PREPROC_FLAG = "ENABLE_FORMAL_VERIFICATION"; // the flag to enable formal verification during compilation
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constexpr char* INITIAL_SIMULATION_FLAG = "INITIAL_SIMULATION"; // the flag to enable initial functional verification
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constexpr char* AUTOCHECKED_SIMULATION_FLAG = "AUTOCHECKED_SIMULATION"; // the flag to enable autochecked functional verification
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constexpr char* FORMAL_SIMULATION_FLAG = "FORMAL_SIMULATION"; // the flag to enable formal functional verification
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constexpr char* DEFAULT_LB_DIR_NAME = "lb/";
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constexpr char* DEFAULT_RR_DIR_NAME = "routing/";
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constexpr char* DEFAULT_SUBMODULE_DIR_NAME = "sub_module/";
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constexpr char* MODELSIM_SIMULATION_TIME_UNIT = "ms";
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// Icarus variables and flag
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constexpr char* ICARUS_SIMULATION_FLAG = "ICARUS_SIMULATOR"; // the flag to enable specific Verilog code in testbenches
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// End of Icarus variables and flag
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constexpr char* VERILOG_TOP_POSTFIX = "_top.v";
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constexpr char* DEFINES_VERILOG_FILE_NAME = "fpga_defines.v";
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constexpr char* DEFINES_VERILOG_SIMULATION_FILE_NAME = "define_simulation.v";
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constexpr char* SUBMODULE_VERILOG_FILE_NAME = "sub_module.v";
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constexpr char* LOGIC_BLOCK_VERILOG_FILE_NAME = "logic_blocks.v";
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constexpr char* LUTS_VERILOG_FILE_NAME = "luts.v";
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constexpr char* ROUTING_VERILOG_FILE_NAME = "routing.v";
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constexpr char* MUXES_VERILOG_FILE_NAME = "muxes.v";
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constexpr char* LOCAL_ENCODER_VERILOG_FILE_NAME = "local_encoder.v";
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constexpr char* MEMORIES_VERILOG_FILE_NAME = "memories.v";
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constexpr char* WIRES_VERILOG_FILE_NAME = "wires.v";
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constexpr char* ESSENTIALS_VERILOG_FILE_NAME = "inv_buf_passgate.v";
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constexpr char* CONFIG_PERIPHERAL_VERILOG_FILE_NAME = "config_peripherals.v";
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constexpr char* USER_DEFINED_TEMPLATE_VERILOG_FILE_NAME = "user_defined_templates.v";
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#endif
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