8 lines
327 B
C
8 lines
327 B
C
|
|
||
|
|
|
||
|
|
void determine_verilog_blwl_decoder_size(INP t_sram_orgz_info* cur_sram_verilog_orgz_info,
|
||
|
|
OUTP int* num_array_bl, OUTP int* num_array_wl,
|
||
|
|
OUTP int* bl_decoder_size, OUTP int* wl_decoder_size);
|
||
|
|
|
||
|
|
void dump_verilog_decoder(char* submodule_dir);
|