Following additions from ver1.20 1. Fixed GT interrupts issue when DC6 is enabled 2. DC 5 and 6 count locations are in the below mentioned offsets - same as ver1.20 DC3_DC5_COUNT 80030 DC5_DC6_COUNT 8002C Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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bxt_dmc_ver1.bin | ||
bxt_dmc_ver1_04.bin | ||
bxt_dmc_ver1_05.bin | ||
skl_dmc_ver1.bin | ||
skl_dmc_ver1_04.bin | ||
skl_dmc_ver1_16.bin | ||
skl_dmc_ver1_18.bin | ||
skl_dmc_ver1_19.bin | ||
skl_dmc_ver1_20.bin | ||
skl_dmc_ver1_21.bin | ||
skl_guc_ver1.bin | ||
skl_guc_ver1_1059.bin |