Version: 1.22 Date : 9/23/2015 Notes: Following additions from ver1.21 1. PLL lock wait time updated 2. DC 5 and 6 count locations are in the below mentioned offsets - same as ver1.21 DC3_DC5_COUNT 80030 DC5_DC6_COUNT 8002C Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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.. | ||
bxt_dmc_ver1.bin | ||
bxt_dmc_ver1_04.bin | ||
bxt_dmc_ver1_05.bin | ||
bxt_dmc_ver1_06.bin | ||
skl_dmc_ver1.bin | ||
skl_dmc_ver1_19.bin | ||
skl_dmc_ver1_20.bin | ||
skl_dmc_ver1_21.bin | ||
skl_dmc_ver1_22.bin | ||
skl_guc_ver1.bin | ||
skl_guc_ver1_1059.bin | ||
skl_guc_ver4.bin | ||
skl_guc_ver4_3.bin |