coriolis/kite
Jean-Paul Chaput bd3984a313 Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
    a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
    given a path and a leaf net. This method is slow and must not be
    used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
    pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
    Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
    of clock nets was incomplete. The case of unrouted clock nets
    that where not connected to the top core clock net, like the
    one in the datapath registers was faulty. They were partly
    recognized as unrouteds and partly as blockage generating a
    routing deadlock: routage impossible due to blockage generated
    from itself...
* New: In Stratus1, add a buildModel() utility function to automate
    the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 22:22:16 +01:00
..
cmake_modules * All tools: 2010-05-19 14:31:10 +00:00
doc Correction of SoC.css, adjust the look of the class index big letters. 2014-06-10 00:04:48 +02:00
src Correctly manage clock net isolateds from the main clock. 2015-02-25 22:22:16 +01:00
CMakeLists.txt Starting to implement support for Windows/Cygwin. 2014-07-13 13:14:49 +02:00