a4e46444e2
* In CRL Core, in BlifParser, when an input terminal of an instance is
either connected to power or ground, insert a zero_x0 or one_x0
Cell to avoid direct connection to the supply (the router is not
able to do it). The names and terminals of the intermediate cells
are hard-wired for now (to SxLib).
When merging Nets, always merge internal nets into external ones
as the other way around is not always legal.
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| python | ||
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| CMakeLists.txt | ||