coriolis/vlsisapd/doc/html/functions_func.html

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<h1 id="pagetop" class="header">VLSI SAPD Documentation</h1>
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<h3><a id="index_a"></a>- a -</h3><ul>
<li>addARule()
: <a class="el" href="class_d_t_r_1_1_techno.html#a5f5a790974fe7d3b1c6f1b698ef0a818">Techno</a>
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<li>addComment()
: <a class="el" href="class_s_p_i_c_e_1_1_subckt.html#a6c590c1d92248d6e5f95ea6c470fbb5a">Subckt</a>
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<li>addConnector()
: <a class="el" href="class_s_p_i_c_e_1_1_instance.html#af9aeca34e780851a2b024df7c5ff5b54">Instance</a>
</li>
<li>addDevice()
: <a class="el" href="class_open_chams_1_1_netlist.html#a8e1798a2516c32fbab629ce8d60d4b1d">Netlist</a>
</li>
<li>addElement()
: <a class="el" href="class_a_g_d_s_1_1_structure.html#a2dd203e6770f7d15d6f706867c919a60">Structure</a>
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<li>addEquation()
: <a class="el" href="class_open_chams_1_1_sizing.html#a01f8823628bb567d1c463c8bef314ca7">Sizing</a>
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<li>addInclude()
: <a class="el" href="class_s_p_i_c_e_1_1_circuit.html#a30fc53c4da54215fdec3ab1b96ea1943">Circuit</a>
</li>
<li>addInstance()
: <a class="el" href="class_open_chams_1_1_layout.html#a4cc1899e9b782de44700fa0e4ac477ef">Layout</a>
, <a class="el" href="class_open_chams_1_1_netlist.html#af0fb73e5e8589a64d13b6d8104a34a03">Netlist</a>
, <a class="el" href="class_open_chams_1_1_schematic.html#ac7fc9f5cdf1e22c53d42e6606e1af8ef">Schematic</a>
, <a class="el" href="class_s_p_i_c_e_1_1_circuit.html#a7bb4a4532643568ab1ac2c229185a88e">Circuit</a>
, <a class="el" href="class_s_p_i_c_e_1_1_subckt.html#a7bb4a4532643568ab1ac2c229185a88e">Subckt</a>
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<li>addInterface()
: <a class="el" href="class_s_p_i_c_e_1_1_subckt.html#ac162264683fa3d9b3384d3e8cc291fa2">Subckt</a>
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<li>addIntermediatePoint()
: <a class="el" href="class_open_chams_1_1_wire.html#aab66049b1f5ccf8de85249720152833a">Wire</a>
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<li>addLibrary()
: <a class="el" href="class_s_p_i_c_e_1_1_circuit.html#a49939060cc1cb8e4bfaf003025032096">Circuit</a>
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<li>addNet()
: <a class="el" href="class_open_chams_1_1_netlist.html#a52be455a704925328843770552eca43d">Netlist</a>
</li>
<li>addOperator()
: <a class="el" href="class_open_chams_1_1_sizing.html#a712e045c11e463cff8411b3d0fd7f732">Sizing</a>
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<li>addOption()
: <a class="el" href="class_s_p_i_c_e_1_1_circuit.html#a1abe34b48e2b6e1834a143fdef159cb9">Circuit</a>
</li>
<li>addParameter()
: <a class="el" href="class_open_chams_1_1_parameters.html#a9ad9a7acc15a142788270ccd255b5e91">Parameters</a>
, <a class="el" href="class_s_p_i_c_e_1_1_circuit.html#ab3ab147a16bc490ce96db905a4ca271c">Circuit</a>
, <a class="el" href="class_s_p_i_c_e_1_1_instance.html#a8d69bbbea5ece0949e100c464e412f20">Instance</a>
, <a class="el" href="class_s_p_i_c_e_1_1_subckt.html#ab3ab147a16bc490ce96db905a4ca271c">Subckt</a>
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<li>addPoint()
: <a class="el" href="class_c_i_f_1_1_polygon.html#ab3047469780327f18539907e1303ea15">Polygon</a>
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<li>addPolygon()
: <a class="el" href="class_c_i_f_1_1_circuit.html#a5b37e86206e2a128ba6db4987dc09a39">Circuit</a>
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<li>addPort()
: <a class="el" href="class_open_chams_1_1_net.html#af395a7c9d6f3c2b24500b91260873664">Net</a>
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<li>addRule()
: <a class="el" href="class_d_t_r_1_1_techno.html#afa2c8412c365c950649b9f81661ecafd">Techno</a>
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<li>addSimulModel()
: <a class="el" href="class_open_chams_1_1_circuit.html#a7c1c09f44cf215dc17d3dd2518e32389">Circuit</a>
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<li>addSource()
: <a class="el" href="class_s_p_i_c_e_1_1_circuit.html#a627cf18c2763bb59f3d7e5142873251c">Circuit</a>
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<li>addStructure()
: <a class="el" href="class_a_g_d_s_1_1_library.html#a93d333a20154e0b688ff3ff213039171">Library</a>
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<li>addSubCircuitPath()
: <a class="el" href="class_open_chams_1_1_circuit.html#a55234deef1d06c617a519a575ce33608">Circuit</a>
</li>
<li>addSubckt()
: <a class="el" href="class_s_p_i_c_e_1_1_circuit.html#a0d1352e46d4537ce1e5f651de40e91a6">Circuit</a>
</li>
<li>addTransistor()
: <a class="el" href="class_open_chams_1_1_device.html#ad45d34f8765dd113a5b12289efe66c07">Device</a>
</li>
<li>addWire()
: <a class="el" href="class_open_chams_1_1_net.html#a643a969f62770301b8b70ed63c36a55e">Net</a>
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