..
attic
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
bora
Various bug fixes for Analog P&R. OK for GM/Chamla & OTA/Miller.
2019-11-13 23:31:51 +01:00
BoraEngine.cpp
Various bug fixes for Analog P&R. OK for GM/Chamla & OTA/Miller.
2019-11-13 23:31:51 +01:00
BoxSet.cpp
Various bug fixes for Analog P&R. OK for GM/Chamla & OTA/Miller.
2019-11-13 23:31:51 +01:00
CMakeLists.txt
First stage in analog capacitor integration
2019-11-07 17:05:49 +01:00
ChannelRouting.cpp
Implementation of a red-black tree and an interval tree.
2018-11-07 23:48:43 +01:00
DSlicingNode.cpp
Added Resistor support. Completed Capacitor & Resistor support in Bora.
2019-11-12 02:21:03 +01:00
GraphicBoraEngine.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
HSlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
HVSetState.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
HVSlicingNode.cpp
Implementation of a red-black tree and an interval tree.
2018-11-07 23:48:43 +01:00
NodeSets.cpp
Added Resistor support. Completed Capacitor & Resistor support in Bora.
2019-11-12 02:21:03 +01:00
ParameterRange.cpp
First stage in analog capacitor integration
2019-11-07 17:05:49 +01:00
Pareto.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
PyBora.cpp
First stage in analog capacitor integration
2019-11-07 17:05:49 +01:00
PyBoraEngine.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
PyDSlicingNode.cpp
Added Resistor support. Completed Capacitor & Resistor support in Bora.
2019-11-12 02:21:03 +01:00
PyGraphicBoraEngine.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
PyHSlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
PyMatrixParameterRange.cpp
First stage in analog capacitor integration
2019-11-07 17:05:49 +01:00
PyParameterRange.cpp
First stage in analog capacitor integration
2019-11-07 17:05:49 +01:00
PyRHSlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
PyRVSlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
PySlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
PyStepParameterRange.cpp
First stage in analog capacitor integration
2019-11-07 17:05:49 +01:00
PyVSlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
RHSlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
RHVSlicingNode.cpp
Implementation of a red-black tree and an interval tree.
2018-11-07 23:48:43 +01:00
RVSlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
SlicingDataModel.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
SlicingDataWidget.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
SlicingNode.cpp
Added Resistor support. Completed Capacitor & Resistor support in Bora.
2019-11-12 02:21:03 +01:00
SlicingPlotWidget.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
SlicingWidget.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
VSlicingNode.cpp
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00
cpps
Analog integration part II. Analog place & route (slicing tree).
2018-10-18 18:10:01 +02:00