676 lines
11 KiB
Plaintext
676 lines
11 KiB
Plaintext
--
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-- Generated by VASY
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--
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ENTITY amd2901 IS
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PORT(
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a : IN BIT_VECTOR(3 DOWNTO 0);
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b : IN BIT_VECTOR(3 DOWNTO 0);
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cin : IN BIT;
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ck : IN BIT;
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cout : OUT BIT;
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d : IN BIT_VECTOR(3 DOWNTO 0);
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i : IN BIT_VECTOR(8 DOWNTO 0);
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ng : OUT BIT;
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noe : IN BIT;
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np : OUT BIT;
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ovr : OUT BIT;
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q0 : INOUT BIT;
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q3 : INOUT BIT;
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r0 : INOUT BIT;
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r3 : INOUT BIT;
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f3 : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT;
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y : OUT BIT_VECTOR(3 DOWNTO 0);
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zero : OUT BIT
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);
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END amd2901;
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ARCHITECTURE VST OF amd2901 IS
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SIGNAL a_from_pads : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL b_from_pads : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL cin_from_pads : BIT;
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SIGNAL cki : BIT;
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SIGNAL ckc : BIT;
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SIGNAL cout_to_pads : BIT;
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SIGNAL d_from_pads : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL i_from_pads : BIT_VECTOR(8 DOWNTO 0);
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SIGNAL ng_to_pads : BIT;
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SIGNAL noe_from_pads : BIT;
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SIGNAL np_to_pads : BIT;
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SIGNAL ovr_to_pads : BIT;
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SIGNAL q0_from_pads : BIT;
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SIGNAL q0_to_pads : BIT;
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SIGNAL q3_from_pads : BIT;
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SIGNAL q3_to_pads : BIT;
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SIGNAL r0_from_pads : BIT;
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SIGNAL r0_to_pads : BIT;
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SIGNAL r3_from_pads : BIT;
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SIGNAL r3_to_pads : BIT;
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SIGNAL shift_l : BIT;
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SIGNAL shift_r : BIT;
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SIGNAL f3_to_pads : BIT;
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SIGNAL y_oe : BIT;
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SIGNAL y_to_pads : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL zero_to_pads : BIT;
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COMPONENT pck_px
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PORT(
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ck : OUT BIT;
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pad : IN BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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COMPONENT pi_px
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PORT(
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ck : IN BIT;
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pad : IN BIT;
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t : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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COMPONENT corona
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PORT(
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a_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
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b_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
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cin_from_pads : IN BIT;
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ck : IN BIT;
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cout_to_pads : OUT BIT;
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d_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
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i_from_pads : IN BIT_VECTOR(8 DOWNTO 0);
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ng_to_pads : OUT BIT;
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noe_from_pads : IN BIT;
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np_to_pads : OUT BIT;
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ovr_to_pads : OUT BIT;
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q0_from_pads : IN BIT;
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q0_to_pads : OUT BIT;
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q3_from_pads : IN BIT;
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q3_to_pads : OUT BIT;
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r0_from_pads : IN BIT;
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r0_to_pads : OUT BIT;
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r3_from_pads : IN BIT;
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r3_to_pads : OUT BIT;
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shift_l : OUT BIT;
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shift_r : OUT BIT;
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f3_to_pads : OUT BIT;
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vdd : IN BIT;
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vss : IN BIT;
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y_oe : OUT BIT;
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y_to_pads : OUT BIT_VECTOR(3 DOWNTO 0);
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zero_to_pads : OUT BIT
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);
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END COMPONENT;
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COMPONENT pvddick_px
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PORT(
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ck : IN BIT;
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cko : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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COMPONENT po_px
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PORT(
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ck : IN BIT;
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i : IN BIT;
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pad : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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COMPONENT pot_px
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PORT(
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b : IN BIT;
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ck : IN BIT;
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i : IN BIT;
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pad : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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COMPONENT piot_px
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PORT(
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b : IN BIT;
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ck : IN BIT;
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i : IN BIT;
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pad : INOUT BIT;
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t : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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COMPONENT pvssick_px
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PORT(
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ck : IN BIT;
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cko : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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COMPONENT pvddeck_px
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PORT(
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ck : IN BIT;
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cko : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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COMPONENT pvsseck_px
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PORT(
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ck : IN BIT;
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cko : OUT BIT;
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vdde : IN BIT;
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vddi : IN BIT;
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vsse : IN BIT;
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vssi : IN BIT
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);
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END COMPONENT;
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BEGIN
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p_i8 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => i_from_pads(8),
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pad => i(8),
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ck => cki
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);
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p_y1 : pot_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => y(1),
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i => y_to_pads(1),
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ck => cki,
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b => y_oe
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);
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p_vddeck0 : pvddeck_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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cko => ckc,
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ck => cki
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);
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p_i4 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => i_from_pads(4),
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pad => i(4),
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ck => cki
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);
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p_b2 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => b_from_pads(2),
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pad => b(2),
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ck => cki
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);
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p_noe : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => noe_from_pads,
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pad => noe,
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ck => cki
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);
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p_ng : po_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => ng,
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i => ng_to_pads,
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ck => cki
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);
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p_q0 : piot_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => q0_from_pads,
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pad => q0,
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i => q0_to_pads,
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ck => cki,
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b => shift_r
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);
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p_r0 : piot_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => r0_from_pads,
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pad => r0,
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i => r0_to_pads,
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ck => cki,
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b => shift_r
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);
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p_vddeck1 : pvddeck_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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cko => ckc,
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ck => cki
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);
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p_i3 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => i_from_pads(3),
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pad => i(3),
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ck => cki
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);
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corona : corona
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PORT MAP (
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a_from_pads => a_from_pads,
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b_from_pads => b_from_pads,
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d_from_pads => d_from_pads,
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i_from_pads => i_from_pads,
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y_to_pads => y_to_pads,
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zero_to_pads => zero_to_pads,
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y_oe => y_oe,
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vss => vssi,
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vdd => vddi,
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f3_to_pads => f3_to_pads,
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shift_r => shift_r,
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shift_l => shift_l,
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r3_to_pads => r3_to_pads,
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r3_from_pads => r3_from_pads,
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r0_to_pads => r0_to_pads,
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r0_from_pads => r0_from_pads,
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q3_to_pads => q3_to_pads,
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q3_from_pads => q3_from_pads,
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q0_to_pads => q0_to_pads,
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q0_from_pads => q0_from_pads,
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ovr_to_pads => ovr_to_pads,
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np_to_pads => np_to_pads,
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noe_from_pads => noe_from_pads,
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ng_to_pads => ng_to_pads,
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cout_to_pads => cout_to_pads,
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ck => ckc,
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cin_from_pads => cin_from_pads
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);
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p_i5 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => i_from_pads(5),
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pad => i(5),
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ck => cki
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);
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p_y2 : pot_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => y(2),
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i => y_to_pads(2),
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ck => cki,
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b => y_oe
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);
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p_vssick0 : pvssick_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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cko => ckc,
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ck => cki
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);
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p_b3 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => b_from_pads(3),
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pad => b(3),
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ck => cki
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);
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p_a3 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => a_from_pads(3),
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pad => a(3),
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ck => cki
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);
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p_d2 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => d_from_pads(2),
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pad => d(2),
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ck => cki
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);
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p_cin : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => cin_from_pads,
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pad => cin,
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ck => cki
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);
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p_i6 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => i_from_pads(6),
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pad => i(6),
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ck => cki
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);
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p_cout : po_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => cout,
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i => cout_to_pads,
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ck => cki
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);
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p_zero : po_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => zero,
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i => zero_to_pads,
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ck => cki
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);
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p_f3 : po_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => f3,
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i => f3_to_pads,
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ck => cki
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);
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p_i2 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => i_from_pads(2),
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pad => i(2),
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ck => cki
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);
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p_ck : pck_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => ck,
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ck => cki
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);
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p_np : po_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => np,
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i => np_to_pads,
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ck => cki
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);
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p_y3 : pot_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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pad => y(3),
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i => y_to_pads(3),
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ck => cki,
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b => y_oe
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);
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p_q3 : piot_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => q3_from_pads,
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pad => q3,
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i => q3_to_pads,
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ck => cki,
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b => shift_l
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);
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p_r3 : piot_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => r3_from_pads,
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pad => r3,
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i => r3_to_pads,
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ck => cki,
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b => shift_l
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);
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p_vsseck1 : pvsseck_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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cko => ckc,
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ck => cki
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);
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p_a0 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => a_from_pads(0),
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pad => a(0),
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ck => cki
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);
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p_b0 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => b_from_pads(0),
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pad => b(0),
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ck => cki
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);
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p_d0 : pi_px
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PORT MAP (
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vssi => vssi,
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vsse => vsse,
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vddi => vddi,
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vdde => vdde,
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t => d_from_pads(0),
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pad => d(0),
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ck => cki
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);
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p_d1 : pi_px
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PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
t => d_from_pads(1),
|
|
pad => d(1),
|
|
ck => cki
|
|
);
|
|
p_i7 : pi_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
t => i_from_pads(7),
|
|
pad => i(7),
|
|
ck => cki
|
|
);
|
|
p_ovr : po_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
pad => ovr,
|
|
i => ovr_to_pads,
|
|
ck => cki
|
|
);
|
|
p_y0 : pot_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
pad => y(0),
|
|
i => y_to_pads(0),
|
|
ck => cki,
|
|
b => y_oe
|
|
);
|
|
p_i0 : pi_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
t => i_from_pads(0),
|
|
pad => i(0),
|
|
ck => cki
|
|
);
|
|
p_a1 : pi_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
t => a_from_pads(1),
|
|
pad => a(1),
|
|
ck => cki
|
|
);
|
|
p_b1 : pi_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
t => b_from_pads(1),
|
|
pad => b(1),
|
|
ck => cki
|
|
);
|
|
p_vddick0 : pvddick_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
cko => ckc,
|
|
ck => cki
|
|
);
|
|
p_vsseck0 : pvsseck_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
cko => ckc,
|
|
ck => cki
|
|
);
|
|
p_i1 : pi_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
t => i_from_pads(1),
|
|
pad => i(1),
|
|
ck => cki
|
|
);
|
|
p_d3 : pi_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
t => d_from_pads(3),
|
|
pad => d(3),
|
|
ck => cki
|
|
);
|
|
p_a2 : pi_px
|
|
PORT MAP (
|
|
vssi => vssi,
|
|
vsse => vsse,
|
|
vddi => vddi,
|
|
vdde => vdde,
|
|
t => a_from_pads(2),
|
|
pad => a(2),
|
|
ck => cki
|
|
);
|
|
END VST;
|