coriolis/documentation/examples/AM2901/amd2901.vst

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--
-- Generated by VASY
--
ENTITY amd2901 IS
PORT(
a : IN BIT_VECTOR(3 DOWNTO 0);
b : IN BIT_VECTOR(3 DOWNTO 0);
cin : IN BIT;
ck : IN BIT;
cout : OUT BIT;
d : IN BIT_VECTOR(3 DOWNTO 0);
i : IN BIT_VECTOR(8 DOWNTO 0);
ng : OUT BIT;
noe : IN BIT;
np : OUT BIT;
ovr : OUT BIT;
q0 : INOUT BIT;
q3 : INOUT BIT;
r0 : INOUT BIT;
r3 : INOUT BIT;
f3 : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT;
y : OUT BIT_VECTOR(3 DOWNTO 0);
zero : OUT BIT
);
END amd2901;
ARCHITECTURE VST OF amd2901 IS
SIGNAL a_from_pads : BIT_VECTOR(3 DOWNTO 0);
SIGNAL b_from_pads : BIT_VECTOR(3 DOWNTO 0);
SIGNAL cin_from_pads : BIT;
SIGNAL cki : BIT;
SIGNAL ckc : BIT;
SIGNAL cout_to_pads : BIT;
SIGNAL d_from_pads : BIT_VECTOR(3 DOWNTO 0);
SIGNAL i_from_pads : BIT_VECTOR(8 DOWNTO 0);
SIGNAL ng_to_pads : BIT;
SIGNAL noe_from_pads : BIT;
SIGNAL np_to_pads : BIT;
SIGNAL ovr_to_pads : BIT;
SIGNAL q0_from_pads : BIT;
SIGNAL q0_to_pads : BIT;
SIGNAL q3_from_pads : BIT;
SIGNAL q3_to_pads : BIT;
SIGNAL r0_from_pads : BIT;
SIGNAL r0_to_pads : BIT;
SIGNAL r3_from_pads : BIT;
SIGNAL r3_to_pads : BIT;
SIGNAL shift_l : BIT;
SIGNAL shift_r : BIT;
SIGNAL f3_to_pads : BIT;
SIGNAL y_oe : BIT;
SIGNAL y_to_pads : BIT_VECTOR(3 DOWNTO 0);
SIGNAL zero_to_pads : BIT;
COMPONENT pck_px
PORT(
ck : OUT BIT;
pad : IN BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
COMPONENT pi_px
PORT(
ck : IN BIT;
pad : IN BIT;
t : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
COMPONENT corona
PORT(
a_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
b_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
cin_from_pads : IN BIT;
ck : IN BIT;
cout_to_pads : OUT BIT;
d_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
i_from_pads : IN BIT_VECTOR(8 DOWNTO 0);
ng_to_pads : OUT BIT;
noe_from_pads : IN BIT;
np_to_pads : OUT BIT;
ovr_to_pads : OUT BIT;
q0_from_pads : IN BIT;
q0_to_pads : OUT BIT;
q3_from_pads : IN BIT;
q3_to_pads : OUT BIT;
r0_from_pads : IN BIT;
r0_to_pads : OUT BIT;
r3_from_pads : IN BIT;
r3_to_pads : OUT BIT;
shift_l : OUT BIT;
shift_r : OUT BIT;
f3_to_pads : OUT BIT;
vdd : IN BIT;
vss : IN BIT;
y_oe : OUT BIT;
y_to_pads : OUT BIT_VECTOR(3 DOWNTO 0);
zero_to_pads : OUT BIT
);
END COMPONENT;
COMPONENT pvddick_px
PORT(
ck : IN BIT;
cko : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
COMPONENT po_px
PORT(
ck : IN BIT;
i : IN BIT;
pad : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
COMPONENT pot_px
PORT(
b : IN BIT;
ck : IN BIT;
i : IN BIT;
pad : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
COMPONENT piot_px
PORT(
b : IN BIT;
ck : IN BIT;
i : IN BIT;
pad : INOUT BIT;
t : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
COMPONENT pvssick_px
PORT(
ck : IN BIT;
cko : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
COMPONENT pvddeck_px
PORT(
ck : IN BIT;
cko : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
COMPONENT pvsseck_px
PORT(
ck : IN BIT;
cko : OUT BIT;
vdde : IN BIT;
vddi : IN BIT;
vsse : IN BIT;
vssi : IN BIT
);
END COMPONENT;
BEGIN
p_i8 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(8),
pad => i(8),
ck => cki
);
p_y1 : pot_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => y(1),
i => y_to_pads(1),
ck => cki,
b => y_oe
);
p_vddeck0 : pvddeck_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
cko => ckc,
ck => cki
);
p_i4 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(4),
pad => i(4),
ck => cki
);
p_b2 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => b_from_pads(2),
pad => b(2),
ck => cki
);
p_noe : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => noe_from_pads,
pad => noe,
ck => cki
);
p_ng : po_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => ng,
i => ng_to_pads,
ck => cki
);
p_q0 : piot_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => q0_from_pads,
pad => q0,
i => q0_to_pads,
ck => cki,
b => shift_r
);
p_r0 : piot_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => r0_from_pads,
pad => r0,
i => r0_to_pads,
ck => cki,
b => shift_r
);
p_vddeck1 : pvddeck_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
cko => ckc,
ck => cki
);
p_i3 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(3),
pad => i(3),
ck => cki
);
corona : corona
PORT MAP (
a_from_pads => a_from_pads,
b_from_pads => b_from_pads,
d_from_pads => d_from_pads,
i_from_pads => i_from_pads,
y_to_pads => y_to_pads,
zero_to_pads => zero_to_pads,
y_oe => y_oe,
vss => vssi,
vdd => vddi,
f3_to_pads => f3_to_pads,
shift_r => shift_r,
shift_l => shift_l,
r3_to_pads => r3_to_pads,
r3_from_pads => r3_from_pads,
r0_to_pads => r0_to_pads,
r0_from_pads => r0_from_pads,
q3_to_pads => q3_to_pads,
q3_from_pads => q3_from_pads,
q0_to_pads => q0_to_pads,
q0_from_pads => q0_from_pads,
ovr_to_pads => ovr_to_pads,
np_to_pads => np_to_pads,
noe_from_pads => noe_from_pads,
ng_to_pads => ng_to_pads,
cout_to_pads => cout_to_pads,
ck => ckc,
cin_from_pads => cin_from_pads
);
p_i5 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(5),
pad => i(5),
ck => cki
);
p_y2 : pot_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => y(2),
i => y_to_pads(2),
ck => cki,
b => y_oe
);
p_vssick0 : pvssick_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
cko => ckc,
ck => cki
);
p_b3 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => b_from_pads(3),
pad => b(3),
ck => cki
);
p_a3 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => a_from_pads(3),
pad => a(3),
ck => cki
);
p_d2 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => d_from_pads(2),
pad => d(2),
ck => cki
);
p_cin : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => cin_from_pads,
pad => cin,
ck => cki
);
p_i6 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(6),
pad => i(6),
ck => cki
);
p_cout : po_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => cout,
i => cout_to_pads,
ck => cki
);
p_zero : po_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => zero,
i => zero_to_pads,
ck => cki
);
p_f3 : po_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => f3,
i => f3_to_pads,
ck => cki
);
p_i2 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(2),
pad => i(2),
ck => cki
);
p_ck : pck_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => ck,
ck => cki
);
p_np : po_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => np,
i => np_to_pads,
ck => cki
);
p_y3 : pot_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => y(3),
i => y_to_pads(3),
ck => cki,
b => y_oe
);
p_q3 : piot_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => q3_from_pads,
pad => q3,
i => q3_to_pads,
ck => cki,
b => shift_l
);
p_r3 : piot_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => r3_from_pads,
pad => r3,
i => r3_to_pads,
ck => cki,
b => shift_l
);
p_vsseck1 : pvsseck_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
cko => ckc,
ck => cki
);
p_a0 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => a_from_pads(0),
pad => a(0),
ck => cki
);
p_b0 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => b_from_pads(0),
pad => b(0),
ck => cki
);
p_d0 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => d_from_pads(0),
pad => d(0),
ck => cki
);
p_d1 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => d_from_pads(1),
pad => d(1),
ck => cki
);
p_i7 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(7),
pad => i(7),
ck => cki
);
p_ovr : po_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => ovr,
i => ovr_to_pads,
ck => cki
);
p_y0 : pot_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
pad => y(0),
i => y_to_pads(0),
ck => cki,
b => y_oe
);
p_i0 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(0),
pad => i(0),
ck => cki
);
p_a1 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => a_from_pads(1),
pad => a(1),
ck => cki
);
p_b1 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => b_from_pads(1),
pad => b(1),
ck => cki
);
p_vddick0 : pvddick_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
cko => ckc,
ck => cki
);
p_vsseck0 : pvsseck_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
cko => ckc,
ck => cki
);
p_i1 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => i_from_pads(1),
pad => i(1),
ck => cki
);
p_d3 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => d_from_pads(3),
pad => d(3),
ck => cki
);
p_a2 : pi_px
PORT MAP (
vssi => vssi,
vsse => vsse,
vddi => vddi,
vdde => vdde,
t => a_from_pads(2),
pad => a(2),
ck => cki
);
END VST;