Data Structure Index

a | b | c | d | e | g | i | l | m | n | o | p | r | s | t | v | w

a	DTRException (DTR)	Library (AGDS)	Polygon (CIF)	t
	e	m	Port
ARule (DTR)			PortPoint	Techno (DTR)
b	Element (AGDS)	map_item (SPICE)	r	Transistor
	g	Mosfet (SPICE)		v
Bloc		n	Rectangle (AGDS)
c	Group		Resistor (SPICE)	Value (SPICE)
	i	Name	Rule (DTR)	Voltage (SPICE)
Capacitor (SPICE)		Net	s	w
Circuit (CIF)	Schematic::Infos	Netlist
Circuit (SPICE)	Instance (SPICE)	Node	Schematic	Wire
Circuit	Instance	o	SimulModel	WirePoint
Net::Connection	InstancePoint		Sizing
Operator::Constraint	IntermediatePoint	OpenChamsException	Source (SPICE)
Current (SPICE)	l	Operator	SpiceException (SPICE)
d		p	Structure (AGDS)
	Layout		Subckt (SPICE)
Device		Parameters

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